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pmod:pmodda1:reference-manual [2022/09/13 17:14] – changed forum.digilentinc.com to forum.digilent.com Jeffrey | pmod:pmodda1:reference-manual [2023/05/11 15:53] (current) – Martha | ||
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+ | ====== Pmod DA1 Reference Manual ====== | ||
+ | |||
+ | <WRAP center important round 60%> | ||
+ | The Pmod DA1 is retired and no longer for sale in our store. | ||
+ | </ | ||
+ | |||
+ | The Digilent Pmod DA1 (Revision C) is an 8-bit Digital-to-Analog Converter module that can output up to four different analog signals simultaneously. This module is ideal for users who want to output a variable voltage signal but do not want to use up their system board' | ||
+ | |||
+ | {{Digilent Image Gallery | ||
+ | | image = {{: | ||
+ | | image = {{: | ||
+ | | image = {{: | ||
+ | | image = {{: | ||
+ | }} | ||
+ | |||
+ | == Download This Reference Manual == | ||
+ | * {{: | ||
+ | |||
+ | ---- | ||
+ | ===== Features ===== | ||
+ | * Two 8-bit DACs | ||
+ | * Four D/A conversion channels | ||
+ | * Maximum conversion rate of 1.875 MSa | ||
+ | * Small PCB size for flexible designs 1.0“ × 0.8” (2.5 cm × 2.0 cm) | ||
+ | * 6-pin Pmod connector with GPIO interface | ||
+ | |||
+ | ---- | ||
+ | =====Functional Description ===== | ||
+ | The Pmod DA1 converts an 8-bit digital input signal to a corresponding analog output voltage ranging from 0 to Vdd. Each of the two [[http:// | ||
+ | |||
+ | ---- | ||
+ | ===== Interfacing with the Pmod===== | ||
+ | The %%Pmod DA1%% communicates with the host board via an [[pmod: | ||
+ | |||
+ | The %%Pmod DA1%% will receive its 8 bits of information from the system board through 16 clock cycles with first eight bits consisting of eight control bits and the remaining eight bits representing the 8 bits of the data with the MSB first. The each bit is received by the rising edge of the serial clock line. The function dictated by the first eight control bits is executed when the chip select line is brought high. | ||
+ | |||
+ | A pinout table and diagram for the %%Pmod DA1%% are provided below: | ||
+ | |||
+ | |||
+ | {{ : | ||
+ | |||
+ | ^ Pin Descriptions for the %%PmodDA1%% | ||
+ | ^ Header J1 ||| | ||
+ | ^ Pin ^ Signal | ||
+ | | 1 | ~SYNC | ||
+ | | 2 | D0 | Input Data 1 |:::| 2 | B1 | Output Data B1 | | ||
+ | | 3 | D1 | Input Data 2 |:::| 3 | A2 | Output Data A2 | | ||
+ | | 4 | SCK | ||
+ | | 5 | GND | ||
+ | | 6 | VCC | ||
+ | **Table 1** Connector J1- Pin Descriptions as labeled on the Pmod | ||
+ | |||
+ | The on-board DACs can in principle use either an external or internal reference voltage; however, the Pmod DA1 is designed that the internal reference voltage of Vdd/2 volts must be used. Because of this, the first bit in the command signal sent to the Pmod must always be a logic low signal in order to use the internal reference voltage on the DAC. Tables describing the command signal and the associated bits from the [[http:// | ||
+ | |||
+ | ^ PmodDA1 Input Shift Register Structure | ||
+ | ^ Control bits |||||||^ | ||
+ | | ~INT/EXT | X | LDAC | PDB | PDA | ~A/B | CR1 | CR0 | DB7 | DB6 | DB5 | DB4 | DB3 | DB2 | DB1 | DB0 | | ||
+ | |(MSB) | ||
+ | **Note*** The " | ||
+ | |||
+ | ^ Bit Descriptions | ||
+ | ^ Bit Name ^ Description | ||
+ | | ~INT/ | ||
+ | | X | Don't Care | | ||
+ | | LDAC | Load DAC bit to both load and update the DAC outputs | | ||
+ | | PDB | Power-down DAC B | | ||
+ | | PDA | Power-down DAC A | | ||
+ | | ~A/B | Selects either DAC A or DAC B to process the data | | ||
+ | | CR1 | Works with CR0 as per the Control Bits Truth Table below | | ||
+ | | CR0 | Works with CR1 as per the Control Bits Truth Table below | | ||
+ | | Data | The user submitted data where DB7 is the MSB and DB0 is the LSB | | ||
+ | |||
+ | ^ Control Bits Truth Table ||||| | ||
+ | ^ LDAC ^ ~A/B ^ CR1 ^ CR0 ^ Resulting Operation | ||
+ | | 0 | X | 0 | 0 | Both DAC registers loaded from the shift register | | ||
+ | | 0 | 0 | 0 | 1 | Update DAC A register from the shift register | | ||
+ | | 0 | 1 | 0 | 1 | Update DAC B register from the shift register | | ||
+ | | 0 | 0 | 1 | 0 | Update DAC A DAC register from the input register | | ||
+ | | 0 | 1 | 1 | 0 | Update DAC B DAC register from the input register | | ||
+ | | 0 | 0 | 1 | 1 | Update DAC A DAC register from the shift register | | ||
+ | | 0 | 1 | 1 | 1 | Update DAC B DAC register from the shift register | | ||
+ | | 1 | 0 | X | X | Load DAC A input register from the shift register and update both DAC registers | | ||
+ | | 1 | 1 | X | X | Load DAC B input register from the shift register and update both DAC registers | | ||
+ | |||
+ | ^ Another Truth Table compiled from the AD7303 Datasheet | ||
+ | ^ PDA ^ PDB ^ Description | ||
+ | | 0 | 0 | Both DACs are Active | ||
+ | | 0 | 1 | DAC A is active and DAC B is in power-down mode |:::| 1 | External reference voltage selected | ||
+ | | 1 | 0 | DAC B is active and DAC A is in power-down mode |:::||| | ||
+ | | 1 | 1 | Both DACs are in power-down mode |:::||| | ||
+ | Any external power applied to the Pmod DA1 must be within 2.7V and 5.5V; however, it is recommended that Pmod is operated at 3.3V. | ||
+ | ---- | ||
+ | ===== Physical Dimensions ===== | ||
+ | The pins on the pin header are spaced 100 mil apart. The PCB is 1 inch long on the sides parallel to the pins on the pin header and 0.8 inches long on the sides perpendicular to the pin header. | ||
+ | ---- | ||
+ | ===== Additional Information ===== | ||
+ | The schematics of the Pmod DA1 are available {{reference: | ||
+ | |||
+ | Example code demonstrating how to get information from the Pmod DA1 can be found [[pmod: | ||
+ | |||
+ | If you have any questions or comments about the Pmod DA1, feel free to post them under the appropriate section (" | ||