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vivado:getting_started:2018.2 [2018/08/09 17:42] – [2. The Start Page] Arthur Brownvivado:getting_started:2018.2 [2018/08/09 18:39] – Arthur Brown
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   * **Open Project:** This button will open a file browser. Navigate to the desired Xilinx Project (.xpr) file and click **Open** to open the project in Vivado.   * **Open Project:** This button will open a file browser. Navigate to the desired Xilinx Project (.xpr) file and click **Open** to open the project in Vivado.
  
-  * **Open Example Project:** This will guide the user through creating a new project based on an example project. These projects will not work on all devices. Many Digilent example projects are instead released on Github, and linked to through FPGA system board resource centers, for which a list can be found [[:reference:programmable-logic:start|here]].+  * **Open Example Project:** This will guide the user through creating a new project based on an example project. These projects will not work on all devices. Many Digilent example projects are instead released on Github, and linked to through the target FPGA System Board's Resource Center, which can be found through the list of [[:reference:programmable-logic:start|List of Digilent FPGA System Boards]].
  
-  * **Open Hardware Manager:** This will open the Hardware Manager without an associated project. If connecting to and programming a device is all that is required by the user this is the button to use.+  * **Open Hardware Manager:** This will open the Hardware Manager without an associated project. If connecting to and programming a device is all that the user wants to do, then this is the button to use.
  
 ===== 3. Creating a New Project ===== ===== 3. Creating a New Project =====
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 === 3.1 === === 3.1 ===
-From the start page, select the //Create New Project// button to start the New Project Wizard.+From the start page, click the //Create New Project// button to start the New Project Wizard.
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 === 3.2 === === 3.2 ===
-The text in this dialog describes the steps that will be taken to create a project. Click //Next// to continue to the first step.+The text in this dialog describes the steps that will be taken to create a project. Click **Next** to continue.
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 === 3.3 === === 3.3 ===
-The first step is to set the name of the project. Vivado will use this name when generating its folder structure.+The first page is used to set the name of the project. Vivado will use this name when generating its folder structure.
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 === Important === === Important ===
 Do NOT use spaces in the project name or location path. This will cause problems with Vivado. Instead use an underscore, a dash, or [[wp>CamelCase]]. Do NOT use spaces in the project name or location path. This will cause problems with Vivado. Instead use an underscore, a dash, or [[wp>CamelCase]].
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-Click //Next// to continue.+Click **Next** to continue.
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 === 3.4 === === 3.4 ===
-Now that the project has a name and a place to save its files we need to select the type of project we will be creating. Select //RTL Project// and make sure to check //Do not specify sources at this time//. Source files will be added and created after the project has been created. Advanced users may use the other options on this screen, but they will not be covered in this guide.+Now that the project has a name and a place to save its files we need to select the type of project we will be creating. Select //RTL Project// and make sure to check the //Do not specify sources at this time// box. Source files will be added and created after the project has been created. Advanced users may use the other options on this screen, but they will not be covered in this guide.
  
-Click //Next// to continue.+Click **Next** to continue.
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 If the target board does not appear in this list, then Digilent's board files haven't yet been installed. If this is the case, revisit the prerequisites section of this guide, then close Vivado and start again from the beginning. If the target board does not appear in this list, then Digilent's board files haven't yet been installed. If this is the case, revisit the prerequisites section of this guide, then close Vivado and start again from the beginning.
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-Now it is time to choose the target device. Click the //Boards// tab at the top of the dialog, then select the target board from the list.+Now it is time to choose the target device. Click the **Boards** tab at the top of the dialog, then select the target board from the list.
  
-Click //Next// to continue.+Click **Next** to continue.
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 === 3.6 == === 3.6 ==
-The next section gives a summary of the options selected throughout the wizard. Verify that the information looks correct and click //Finish//.+The next section gives a summary of the options selected throughout the wizard. Verify that the information looks correct and click **Finish**.
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 === 6.1 === === 6.1 ===
-In the //Project Manager// section of the //Flow Navigator//, click the {{:vivado:getting_started:v2016.4:sources:add-sources.png}} button. In the wizard that pops up, select //Add or create constraints// then click //Next//.+In the //Project Manager// section of the //Flow Navigator//, click the {{:vivado:getting_started:v2016.4:sources:add-sources.png}} button. In the wizard that pops up, select //Add or create constraints// then click **Next**.
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 === 6.2 === === 6.2 ===
-At this stage, Vivado provides a list of all of the constraint files that will be added or created when we click Finish. Currently this list is empty, this will change when files have been added or created. A constraint file will not be created from scratch in this guide, so click //Add Files//.+At this stage, Vivado provides a list of all of the constraint files that will be added or created when we click Finish. Currently this list is empty, this will change when files have been added or created. A constraint file will not be created from scratch in this guide, so click **Add Files**.
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 === 6.3 === === 6.3 ===
-Find the directory the //digilent-xdc-master.zip// archive was extracted into, then click on the file for the target FPGA system board.+Find the directory the "digilent-xdc-master.zip" archive was extracted into, then click on the file for the target FPGA system board.
  
-Click //OK// to continue.+Click **OK** to continue.
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 === 6.4 === === 6.4 ===
-Make sure that the selected XDC file has been added into the list of sources. Make sure that the "Copy constraint files into project" box is checked, so that the original file will be left alone so that it can be used in other projects. Click //Finish//.+Make sure that the selected XDC file has been added into the list of sources. Make sure that the "Copy constraint files into project" box is checked, so that the original file will be left alone so that it can be used in other projects. Click **Finish**.
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 === 7.1 === === 7.1 ===
-In the //Project Manager// section of the //Flow Navigator//, click the {{:vivado:getting_started:v2016.4:sources:add-sources.png}} button again. Select //Add or create design sources// then click //Next//.+In the //Project Manager// section of the //Flow Navigator//, click the {{:vivado:getting_started:v2016.4:sources:add-sources.png}} button again. Select //Add or create design sources// then click **Next**.
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 === 7.2 === === 7.2 ===
-As before, at this stage, a list is provided of all of the source files that will be added or created when Finish is clicked. Instead of clicking Add Files, click //Create File//.+As before, at this stage, a list is provided of all of the source files that will be added or created when Finish is clicked. Instead of clicking Add Files, click **Create File**.
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 === Tip === === Tip ===
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 Do NOT use spaces in file names. This will cause problems with Vivado. Instead use an underscore, a dash, or [[wp>CamelCase]]. Do NOT use spaces in file names. This will cause problems with Vivado. Instead use an underscore, a dash, or [[wp>CamelCase]].
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-Click //OK// to continue.+Click **OK** to continue.
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 === 7.4 === === 7.4 ===
-Make sure that the new Verilog source file has been added into the list of sources, then click //Finish//.+Make sure that the new Verilog source file has been added into the list of sources, then click **Finish**.
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 === 7.5 === === 7.5 ===
-Unlike when the constraint file was added, at this point a //Define Module// dialog will pop up. The Verilog module can be renamed using the //Module name// field, but this is unnecessary in this instance. The Verilog module's clock and led ports need to be defined. Clicking the //Add// ({{:vivado:getting_started:v2016.4:sources:add-port.png?direct|}}) button will add an empty slot for a port to the //I/O Port Definitions// list.+Unlike when the constraint file was added, at this point a //Define Module// dialog will pop up. The Verilog module can be renamed using the //Module name// field, but this is unnecessary in this instance. The Verilog module's clock and led ports need to be defined. Clicking the **Add** ({{:vivado:getting_started:v2016.4:sources:add-port.png?direct|}}) button will add an empty slot for a port to the //I/O Port Definitions// list.
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 Add a single-bit output port with the same name as the LED port that was uncommented in the XDC file. Add a single-bit output port with the same name as the LED port that was uncommented in the XDC file.
  
-Once these two or three ports have been added, click //OK// to continue.+Once these two or three ports have been added, click **OK** to continue.
  
 ---- ----
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   * **Generate Memory Configuration File** lets the user create a file that can be used to program a non-volatile memory part on an FPGA system board, so that the FPGA can be automatically programmed each time that the board is powered on.   * **Generate Memory Configuration File** lets the user create a file that can be used to program a non-volatile memory part on an FPGA system board, so that the FPGA can be automatically programmed each time that the board is powered on.
  
-For the purposes of this guide, select **Open Hardware Manager**, then click **OK**.+For the purposes of this guide, select //Open Hardware Manager//, then click **OK**.
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   * Open the //Hardware Manager// and click the {{:vivado:getting_started:open_target_banner.png?nolink}} link in the green banner at the top of the screen.    * Open the //Hardware Manager// and click the {{:vivado:getting_started:open_target_banner.png?nolink}} link in the green banner at the top of the screen. 
   * Or click the {{:vivado:getting_started:open_target_btn.png?nolink}} button in the //Flow Navigator// under {{:vivado:getting_started:hw_man_btn.png?nolink}}.   * Or click the {{:vivado:getting_started:open_target_btn.png?nolink}} button in the //Flow Navigator// under {{:vivado:getting_started:hw_man_btn.png?nolink}}.
-From the drop-down that opens from either button, select {{:vivado:getting_started:open_new_target_btn.png?nolink}}.+From the drop-down that opens from either button, click {{:vivado:getting_started:open_new_target_btn.png?nolink}}.
  
-Once the wizard opens, click //Next//.+Once the wizard opens, click **Next**.
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 The next screen asks if the hardware server is local or remote. If the board is connected to the host computer choose local, if it is connected to another machine choose remote and fill in the //Host Name// and //Port// fields.\ The next screen asks if the hardware server is local or remote. If the board is connected to the host computer choose local, if it is connected to another machine choose remote and fill in the //Host Name// and //Port// fields.\
  
-Click //Next// to continue.+Click **Next** to continue.
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 This screen gives a list of devices connected to the hardware server. If there is only one connected it should be the only device shown. If there are multiple connected devices, determine the serial number of the device to connect to and find it in the list. This screen gives a list of devices connected to the hardware server. If there is only one connected it should be the only device shown. If there are multiple connected devices, determine the serial number of the device to connect to and find it in the list.
  
-Click //Next// to continue.+Click **Next** to continue.
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 == 9.1(A).4 == == 9.1(A).4 ==
-The final screen shows a summary of the options selected in the wizard. Verify the information and click //Finish//. The board is now connected to the hardware manager.+The final screen shows a summary of the options selected in the wizard. Verify the information and click **Finish**. The board is now connected to the hardware manager.
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 {{ :vivado:getting_started:2018.2:hw-man-program-device.png?direct&500 |}} {{ :vivado:getting_started:2018.2:hw-man-program-device.png?direct&500 |}}
  
-The //Bitstream File// field should be automatically filled in with the bit file generated earlier. If not, click the {{:vivado:getting_started:browse_btn.png?nolink}} button at the right end of the field and navigate to \\ //<Project Directory>/<Project Name>.runs/impl_1/// and select the bit file (Example: {{:vivado:getting_started:bit_file_ex.png?nolink}}). Now click //Program//. This will connect to the board, clear the current configuration, and program using the new bit file.+The //Bitstream File// field should be automatically filled in with the bit file generated earlier. If not, click the {{:vivado:getting_started:browse_btn.png?nolink}} button at the right end of the field and navigate to \\ //<Project Directory>/<Project Name>.runs/impl_1/// and select the bit file (Example: {{:vivado:getting_started:bit_file_ex.png?nolink}}). Now click **Program**. This will connect to the board, clear the current configuration, and program using the new bit file.
  
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