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programmable-logic:cora-z7:reference-manual [2023/05/12 19:00] – [4 DDR3L Memory] Arthur Brownprogrammable-logic:cora-z7:reference-manual [2023/06/22 21:14] (current) – Arthur Brown
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     * Programmable from JTAG and microSD card     * Programmable from JTAG and microSD card
   * **Memory**   * **Memory**
-    * 512MB DDR3 with 16-bit bus @ 1050Mbps+    * 512MB DDR3 with 16-bit bus @ 525 MHz (1050 MT/s)
     * microSD slot     * microSD slot
   * **Power**   * **Power**
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 ===== 9 Clock Sources ===== ===== 9 Clock Sources =====
  
-The Cora Z7 provides a 50 MHz clock to the Zynq PS_CLK input, which is used to generate the clocks for each of the Processing System (PS) subsystems. The 50 MHz input allows the processor to operate at a maximum frequency of 650 MHz and the DDR3 memory controller to operate at a maximum of 525 MHz (1050 Mbps). The Cora Z7 Zynq Preset file available within the Digilent Vivado Board File package ([[:vivado:installing-vivado:start#installing_digilent_board_files|Installation Instructions]]) can be imported into the Zynq Processing System IP core in a Vivado project to properly configure the Zynq to work with the 50 MHz input clock.+The Cora Z7 provides a 50 MHz clock to the Zynq PS_CLK input, which is used to generate the clocks for each of the Processing System (PS) subsystems. The 50 MHz input allows the processor to operate at a maximum frequency of 650 MHz and the DDR3 memory controller to operate at a maximum of 525 MHz (1050 MT/s). The Cora Z7 Zynq Preset file available within the Digilent Vivado Board File package ([[:vivado:installing-vivado:start#installing_digilent_board_files|Installation Instructions]]) can be imported into the Zynq Processing System IP core in a Vivado project to properly configure the Zynq to work with the 50 MHz input clock.
  
 The PS has a dedicated Phase-Locked Loop (PLL) capable of generating up to four reference clocks, each with settable frequencies, that can be used to clock custom logic implemented in the Programmable Logic (PL). Additionally, the Cora Z7 provides an external 125 MHz reference clock directly to pin H16 of the PL. The external reference clock allows the PL to be used completely independently of the PS, which can be useful for simple applications that do not require the processor.  The PS has a dedicated Phase-Locked Loop (PLL) capable of generating up to four reference clocks, each with settable frequencies, that can be used to clock custom logic implemented in the Programmable Logic (PL). Additionally, the Cora Z7 provides an external 125 MHz reference clock directly to pin H16 of the PL. The external reference clock allows the PL to be used completely independently of the PS, which can be useful for simple applications that do not require the processor.