Differences

This shows you the differences between two versions of the page.

--- nexys4-ddr:migration [2017/09/14 00:17] – sbobrowicz
+++ nexys4-ddr:migration [2024/04/12 22:57] (current) – updated migration language James Colvin
@@ Line 1: / Line 1: @@
+~~META: robots = noindex, nofollow ~~
 ====== Nexys 4 DDR Migration Guide ======
+In late 2018, the Nexys A7 was release as the new branded version of the Nexys 4 DDR (Rev A through C), starting with Revision D. No changes to the .xdc files, board files, or existing Nexys 4 DDR materials are needed to make this transition. Regardless, all of the latest materials, including demo projects re-built for newer versions of Vivado, are freely available on the [[programmable-logic:nexys-a7:start|Nexys A7 Resource Center]].
+----
 As of Feb 2015- the cellular RAM used on the [[nexys:nexys2:nexys2|Nexys 2 ]], [[nexys:nexys3:nexys3|Nexys 3 ]]and the [[nexys:nexys4:start|Nexys 4]] was EOL.
 {{:nexys:nexys2:media.digikey.com_pdf_pcns_micron_pcn_30909_p23-26z_obs.pdf|EOL Announcement}}
-To help with this, we have created a Migration Guide to assist you to change your course over.
+To help with this, we have created a Migration Guide to assist you to change your course over to instead use the DDR memory present on the Nexys 4 DDR.
 **Select the Nexys model you are migrating from**