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learn:programmable-logic:tutorials:getting-started-with-fpga:start [2016/07/25 21:01] – Marthalearn:programmable-logic:tutorials:getting-started-with-fpga:start [2021/05/14 23:06] (current) – ↷ Links adapted because of a move operation Arthur Brown
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 ==== Software ==== ==== Software ====
   * <wrap todo>Xilinx ISE WebPACK</wrap>.   * <wrap todo>Xilinx ISE WebPACK</wrap>.
-  * [[reference/software/adept/start]]+  * [[software:adept:start]]
  
 ==== Hardware ==== ==== Hardware ====
-  * Xilinx ISE compatible board such as [[reference/programmable-logic/nexys-4/start]], [[reference/programmable-logic/nexys-3/start]], [[reference/programmable-logic/nexys-2/start]], or [[reference/programmable-logic/basys-2/start]]+  * Xilinx ISE compatible board such as [[programmable-logic:nexys-4:start]], [[programmable-logic:nexys-3:start]], [[programmable-logic:nexys-2:start]], or [[programmable-logic:basys-2:start]]
  
 ---- ----
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 {{:learn:programmable-logic:tutorials:getting-started-with-fpga:basys2_p1.zip|Basys 2}} {{:learn:programmable-logic:tutorials:getting-started-with-fpga:basys2_p1.zip|Basys 2}}
  
-1. Open the "ISE project navigator" +1. Open the "ISE project navigator"\\ 
-2. Click on File and then New Project. This will open the new project wizard. +2. Click on File and then New Project. This will open the new project wizard.\\ 
-3. On the first page:+3. On the first page:\\
     * Enter a name for the project, in this case project 0.     * Enter a name for the project, in this case project 0.
     * NOTE: it is recommended that the path of location and working directory does not contain white spaces (i.e., C:\Document and Settings\... is not recommended as there are spaces in the path. Having white spaces in the file path may cause XST to fail.)     * NOTE: it is recommended that the path of location and working directory does not contain white spaces (i.e., C:\Document and Settings\... is not recommended as there are spaces in the path. Having white spaces in the file path may cause XST to fail.)
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:newproject.png?direct |Create New Project}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:newproject.png?direct |Create New Project}}
-4. In the project settings, you will need to select details that pertain to your FPGA on the board. The Nexys 3 is being used for this example.+4. In the project settings, you will need to select details that pertain to your FPGA on the board. The Nexys 3 is being used for this example.\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:projectsettings.png?direct |Project Settings}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:projectsettings.png?direct |Project Settings}}
    * For Nexys 4:    * For Nexys 4:
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      * Package: CP132      * Package: CP132
      * Speed: -4      * Speed: -4
-5. The final page of the wizard shows the project summary. Click finish after you have looked over the details of your project.+5. The final page of the wizard shows the project summary. Click finish after you have looked over the details of your project.\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:projectsummary.png?direct |Project Summary}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:projectsummary.png?direct |Project Summary}}
-6. After the wizard finishesm you will be left with a blank window similar to the image below:+6. After the wizard finishesm you will be left with a blank window similar to the image below:\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:blankwindow.png?direct |Blank Window}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:blankwindow.png?direct |Blank Window}}
-7. Right-click on the name of your board's chip and select the option "add copy of source"+7. Right-click on the name of your board's chip and select the option "add copy of source"\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:copyofsource.png?direct |Add copy of source windown}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:copyofsource.png?direct |Add copy of source windown}}
-8. After adding the “ project0_demo.v” file to the project, add the .ucf file from the directory to the project using the instructions from the previous step. You can examine both the Verilog file (file.v) and the UCF file (.ucf) by double-clicking the file in the design window in the left pane. +8. After adding the “ project0_demo.v” file to the project, add the .ucf file from the directory to the project using the instructions from the previous step. You can examine both the Verilog file (file.v) and the UCF file (.ucf) by double-clicking the file in the design window in the left pane.\\ 
-9. Now that you have the Verilog file and the appropriate UCF file added to the project, you can build the project by double-clicking on “generate programming file”.+9. Now that you have the Verilog file and the appropriate UCF file added to the project, you can build the project by double-clicking on “generate programming file”.\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:generate.png?direct |Generate file}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:generate.png?direct |Generate file}}
-10. Once the project is done building the bit file, the window will look like this:+10. Once the project is done building the bit file, the window will look like this:\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:donebuilding.png?direct |}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:donebuilding.png?direct |}}
 11. Now that we have a bit file generated from the Xilinx tools, it's time to program with Adept! 11. Now that we have a bit file generated from the Xilinx tools, it's time to program with Adept!
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 ===== 3. Setup Your FPGA Board and Program it with the Bit File ===== ===== 3. Setup Your FPGA Board and Program it with the Bit File =====
-1. If you have not already installed Digilent Adept System, then please go here to do so: Digilent Adept +1. If you have not already installed Digilent Adept System, then please go here to do so: Digilent Adept\\ 
-2. Once installed, open the Adept program and the software will automatically recognize your board. A Nexys3 is being used for this demonstration, but note that the window will say the name of whichever FPGA you are using.+2. Once installed, open the Adept program and the software will automatically recognize your board. A Nexys3 is being used for this demonstration, but note that the window will say the name of whichever FPGA you are using.\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:adept.png?direct |Digilent Adept}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:adept.png?direct |Digilent Adept}}
-3. You will now program the board with the compiled bit file from Step 2, to do this click browse and navigate to the working directory you chose and select the .bit file.+3. You will now program the board with the compiled bit file from Step 2, to do this click browse and navigate to the working directory you chose and select the .bit file.\\
 {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:bitfile.png?direct |}} {{ :learn:programmable-logic:tutorials:getting-started-with-fpga:bitfile.png?direct |}}
-4. Click on program and your board will be programmed. You will see the demo operating and showing the green LEDs on except for a moving off LED. The seven segment display will change through the different segments. When this is complete you have finished this project! +4. Click on program and your board will be programmed. You will see the demo operating and showing the green LEDs on except for a moving off LED. The seven segment display will change through the different segments. When this is complete you have finished this project!\\ 
-{{tag>learn programmable-logic tutorial nexys-3 nexys-2 basys-2 fpga getting-started}}+ 
 +{{tag>learn programmable-logic tutorial nexys-4 nexys-3 nexys-2 basys-2 fpga getting-started}}