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programmers:jtag-smt3:start [2021/10/13 13:57] – external edit 127.0.0.1programmers:jtag-smt3:start [2023/08/16 17:05] (current) – added SoV James Colvin
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 +~~NOTOC~~
 + 
 +====== JTAG-SMT3-NC Resource Center======
  
 +{{Digilent Infobox
 +| Store Page = https://digilent.com/shop/jtag-smt3-nc-surface-mount-programming-module/
 +| Manual = [[reference-manual]]
 +| Support = https://forum.digilent.com/forum/4-fpga/
 +| Title = JTAG-SMT3-NC
 +| Subtitle = Surface-mount Programming Module
 +| Header = Features
 +| Bullet = Small, complete, all-in-one JTAG programming/debugging solution for Xilinx FPGAs with UART side channel
 +| Bullet = Compatible with Xilinx Tools
 +| Bullet = High-Speed USB 2.0 port that can drive JTAG bus up to 30Mbit/sec (frequency settable by user)
 +| Bullet = Open drain buffer on PS_SRST_B pin allows debugging software to reset the processor core of Xilinx’s Zynq® platform
 +| Bullet = Dual channel USB controller provides simultaneous access to both JTAG and UART interfaces
 +| Bullet = Separate Vref for JTAG and UART signals allows each interface to operate at difference voltages (1.8V to 5.5V)
 +| Bullet = Small form-factor surface-mount module can be directly loaded on target boards
 +| Bullet = USB D+ and D- signals routed to pads, allowing USB connector to be placed anywhere on the host PCB
 +| Bullet = VBUS_DETECT pin allows for reduced current consumption when the module isn’t connected to a PC
 +| Header = Product Compliance
 +| HTC = 8473301180
 +| ECCN = EAR99
 +
 +}}
 +
 +{{page>reference-manual}}
 +
 +===== Documentation =====
 +{{topic>jtag-smt3 +doc}}
 +  * {{:reference:programmers:jtag-smt3:jtag-smt3_dimensions.zip| Mechanical Drawings}}
 +  * {{https://files.digilent.com/resources/programmers/jtag-smt3-nc/JTAG-SMT3-NC_SoV.pdf|Statement of Volatility}}
 +
 +----
 +
 +===== Tutorials =====
 +{{topic>jtag-smt3 +tutorial}}
 +
 +----
 +
 +
 +{{tag>programmers start jtag-smt3 resource-center}}