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programmable-logic:zybo-z7:demos:xadc [2022/09/12 12:38] – changed forum.digilentinc.com to forum.digilent.com Jeffrey | programmable-logic:zybo-z7:demos:xadc [2023/08/25 00:39] (current) – Move to direct file links for downloads Arthur Brown | ||
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+ | ====== Zybo Z7 XADC Demo ====== | ||
+ | {{: | ||
+ | |||
+ | ---- | ||
+ | ===== Description ===== | ||
+ | |||
+ | This simple XADC demo is a Verilog project made to demonstrate usage of the Analog to Digital Converter hardware present within the Zybo Z7's Zynq chip. | ||
+ | * An XADC IP core is used to read the voltage differences of each of the four vertical pairs of pins - channels - of the XADC Pmod Port. | ||
+ | * The LED associated with a channel brightens as that channel' | ||
+ | |||
+ | ---- | ||
+ | ===== Inventory ===== | ||
+ | |||
+ | * Zybo Z7 with a MicroUSB Programming Cable | ||
+ | * Vivado installation compatible with the latest release of this demo (2022.1) | ||
+ | * //See [[programmable-logic: | ||
+ | * A circuit to measure | ||
+ | |||
+ | ---- | ||
+ | ===== Download and Usage Instructions ===== | ||
+ | |||
+ | First and foremost, releases - consisting of a set of files for download - are only compatible with a specific version of the Xilinx tools, as specified in the name of the release (referred to as a //release tag//). In addition, releases are only compatible with the specified variant of the board. For example, a release tagged " | ||
+ | |||
+ | The latest release version for this demo is highlighted in green. | ||
+ | |||
+ | **Note:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.// | ||
+ | |||
+ | ^ Board Variant | ||
+ | | Zybo Z7-10 | @#C0EEBD: 10/ | ||
+ | | Zybo Z7-20 | @# | ||
+ | | Zybo Z7-10 | 10/ | ||
+ | | Zybo Z7-20 | 20/ | ||
+ | | Zybo Z7-20 | 20/ | ||
+ | | Zybo Z7-10 | 10/ | ||
+ | | Zybo Z7-20 | v2018.2-1 | ||
+ | | Zybo Z7-10 | v2018.2-1 | ||
+ | | Zybo Z7-20 | v2016.4-1 | ||
+ | | Zybo Z7-10 | v2016.4-1 | ||
+ | |||
+ | **Note for Advanced Users:** //GitHub sources for this demo can be found in the [[https:// | ||
+ | ---- | ||
+ | Instructions on the use of the latest release can be found in this dropdown: | ||
+ | |||
+ | --> Using the Latest Release #^ | ||
+ | |||
+ | <WRAP group> | ||
+ | |||
+ | {{page> | ||
+ | |||
+ | --> Set up the Zybo Z7 # | ||
+ | |||
+ | <columns 100% 50%> | ||
+ | In order to use the demo, you will need to connect a circuit to the XADC Pmod Port in order to measure a voltage. The following example shows a voltage divider that produces each voltage between 0 V and 1 V in increments of 0.33 V. This circuit uses a chain of three 1 kΩ resistors in series with a 4.7 kΩ and a 2.2 kΩ resistor. The circuit is tied to the 3V3 and GND pins of the XADC Pmod header to provide power. Each of the ' | ||
+ | < | ||
+ | {{: | ||
+ | </ | ||
+ | |||
+ | <WRAP round important> | ||
+ | ===Important=== | ||
+ | Voltages to be measured should be in the range of 0 to 1.0 Volts. | ||
+ | </ | ||
+ | |||
+ | ---- | ||
+ | <-- | ||
+ | |||
+ | {{page> | ||
+ | |||
+ | At this point, the demo is now running on your board. Refer to the [[# | ||
+ | </ | ||
+ | |||
+ | <-- | ||
+ | |||
+ | ---- | ||
+ | ===== XADC Channels ===== | ||
+ | |||
+ | Each analog input channel will control the brightness of an LED as shown in the following table: | ||
+ | |||
+ | | Channel Name ^ LED # ^ Pmod Pin #s ^ | ||
+ | ^ AD14 | LD0 | 1 & 7 | | ||
+ | ^ AD7 | LD1 | 2 & 8 | | ||
+ | ^ AD15 | LD2 | 3 & 9 | | ||
+ | ^ AD6 | LD3 | 4 & 10 | | ||
+ | |||
+ | Changing Voltages by reconfiguring the circuit while the demo is running is fine. If you built the example circuit shown in the "Using the Latest Release" | ||
+ | |||
+ | ===== Additional Resources ===== | ||
+ | |||
+ | All materials related to the use of the Zybo Z7 can be found on its [[..: | ||
+ | |||
+ | For a walkthrough of the process of creating a simple HDL project in Vivado, see [[programmable-logic: | ||
+ | |||
+ | For technical support, please visit the [[https:// | ||
+ | |||
+ | ---- |