Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
programmable-logic:nexys-a7:demos:gpio [2022/04/02 00:22] – [Additional Resources] Arthur Brown | programmable-logic:nexys-a7:demos:gpio [2023/08/24 23:31] (current) – Move to direct file links for downloads Arthur Brown | ||
---|---|---|---|
Line 1: | Line 1: | ||
====== Nexys A7 GPIO Demo ====== | ====== Nexys A7 GPIO Demo ====== | ||
- | |||
- | <WRAP todo important> | ||
- | == Under Construction == | ||
- | </ | ||
{{: | {{: | ||
Line 19: | Line 15: | ||
* Nexys A7 with a MicroUSB Programming Cable | * Nexys A7 with a MicroUSB Programming Cable | ||
- | * Vivado installation compatible with the latest release of this demo (2020.1) | + | * Vivado installation compatible with the latest release of this demo (2022.1) |
* //See [[programmable-logic: | * //See [[programmable-logic: | ||
* Serial Terminal application to receive messages printed by the demo | * Serial Terminal application to receive messages printed by the demo | ||
Line 30: | Line 26: | ||
The following releases of this demo can be used with instructions found in the corresponding READMEs in order to run the demo. | The following releases of this demo can be used with instructions found in the corresponding READMEs in order to run the demo. | ||
- | Releases are only compatible with the version of the Xilinx tools specified in the release version number. In addition, releases are only compatible with the specified variant of the board. For example, | + | Releases are only compatible with the version of the Xilinx tools specified in the release version number. In addition, releases are only compatible with the specified variant of the board. For example, |
The latest release version for this demo is highlighted in green. | The latest release version for this demo is highlighted in green. | ||
Line 36: | Line 32: | ||
**Note:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.// | **Note:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.// | ||
- | ^ Board Variant | + | ^ Board Variant |
- | | Nexys A7-100T | + | | Nexys A7-100T |
- | | Nexys A7-50T | + | | Nexys A7-50T |
- | | Nexys A7-100T | + | | Nexys A7-100T |
- | | Nexys A7-50T | + | | Nexys A7-50T |
+ | | Nexys A7-100T | ||
+ | | Nexys A7-50T | ||
+ | | Nexys A7-100T | ||
+ | | Nexys A7-50T | ||
- | **Note for Advanced Users:** //All demos for the Nexys A7 are provided through | + | **Note for Advanced Users:** //GitHub sources |
---- | ---- | ||
Instructions on the use of the latest release can be found in this dropdown: | Instructions on the use of the latest release can be found in this dropdown: | ||
- | --> Using the Latest Release # | + | --> Using the Latest Release #^ |
<WRAP group> | <WRAP group> | ||
Line 96: | Line 96: | ||
For a walkthrough of the process of creating a simple baremetal software project in Vivado and Vitis, see [[programmable-logic: | For a walkthrough of the process of creating a simple baremetal software project in Vivado and Vitis, see [[programmable-logic: | ||
- | For technical support, please visit the [[https:// | + | For technical support, please visit the [[https:// |
---- | ---- |