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programmable-logic:genesys-zu:start [2022/03/04 20:40] – Update tutorials links Arthur Brownprogrammable-logic:genesys-zu:start [2023/12/04 23:31] (current) – [Guides] remove incompatible baremetal software guide Arthur Brown
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 | Manual = [[reference-manual]] | Manual = [[reference-manual]]
 | Getting Started = [[getting-started]] | Getting Started = [[getting-started]]
-| Support = https://forum.digilentinc.com/forum/4-fpga/+| Support = https://forum.digilent.com/forum/4-fpga/
 | Title = Genesys ZU | Title = Genesys ZU
 | Subtitle = Zynq Ultrascale+ MPSoC Development Board | Subtitle = Zynq Ultrascale+ MPSoC Development Board
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   * {{ :reference::programmable-logic:genesys-zu:genesys_zu-3eg_revd1_sch_public.pdf |Genesys ZU-3EG Schematic Rev D.1}}   * {{ :reference::programmable-logic:genesys-zu:genesys_zu-3eg_revd1_sch_public.pdf |Genesys ZU-3EG Schematic Rev D.1}}
   * {{ :reference::programmable-logic:genesys-zu:genesys_zu-5ev_sch_public.pdf |Genesys ZU-5EV Schematic Rev D.1}}   * {{ :reference::programmable-logic:genesys-zu:genesys_zu-5ev_sch_public.pdf |Genesys ZU-5EV Schematic Rev D.1}}
-  * [[https://www.xilinx.com/support/documentation/data_sheets/ds890-ultrascale-overview.pdf|Xilinx Ultrascale Architecture and Product Data Sheet: Overview]]+  * [[https://docs.xilinx.com/v/u/en-US/ds890-ultrascale-overview|Xilinx Ultrascale Architecture and Product Data Sheet: Overview]] 
 + 
 +**Note:** //Xilinx software tools are not available for download in some countries. Prior to purchasing the Genesys ZU, please check the supporting software's availability, as it is required for the board's use.//
  
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   * [[programmable-logic/guides/installing-vivado-and-vitis]]   * [[programmable-logic/guides/installing-vivado-and-vitis]]
     * **Note:** //When installing Vivado, make sure to include support for Zynq Ultrascale+ parts.//     * **Note:** //When installing Vivado, make sure to include support for Zynq Ultrascale+ parts.//
-  * [[programmable-logic/guides/getting-started-with-ipi]] 
-    * **Note:** //This guide was originally written for non-Ultrascale Zynq boards and boards using Microblaze. The flow for Ultrascale Zynq is largely the same as non-Ultrascale Zynq. The "Zynq Ultrascale+ MPSoC" IP core should be used in place of the "ZYNQ7 Processing System"// 
  
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