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programmable-logic:cora-z7:start [2022/09/01 06:03] – [Example Projects] Andrei Sopterean | programmable-logic:cora-z7:start [2023/08/29 16:06] (current) – ↷ Links adapted because of a move operation Arthur Brown | ||
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+ | ~~NOTOC~~ | ||
+ | |||
+ | ====== Cora Z7 ====== | ||
+ | {{Digilent Infobox | ||
+ | | Store Page = https:// | ||
+ | | Manual = [[reference-manual]] | ||
+ | | Support = http:// | ||
+ | | Title = Cora Z7 | ||
+ | | Subtitle = Zynq for Hobbyists and Makers | ||
+ | | Header = Features | ||
+ | | Bullet = Full support for Vivado and Petalinux design environments | ||
+ | | Bullet = 667 MHz Cortex-A9 processor with tightly integrated Xilinx FPGA | ||
+ | | Bullet = 512 MB DDR3 memory | ||
+ | | Bullet = Arduino shield and Pmod connectors for add-on hardware devices | ||
+ | | Bullet = USB and Ethernet connectivity | ||
+ | | Bullet = Large array of general purpose input/ | ||
+ | | Bullet = Small form factor and mounting holes | ||
+ | | Bullet = Programmable from JTAG and microSD card | ||
+ | | Header = Key FPGA Specifications | ||
+ | | Part Number = XC7Z007S-1CLG400 \\ (XC7Z010-1CLG400*) | ||
+ | | Logic Slices = 3,600 (4,400*) | ||
+ | | 6-input LUTs = 14,400 (17,600*) | ||
+ | | Flip-Flops = 28,800 (35,200*) | ||
+ | | Block RAM = 225 KB (270 KB*) | ||
+ | | DSP Slices = 66 (80*) | ||
+ | | Clock Resources = Zynq PLL with 4 outputs \\ 2 PLLs \\ 2 MMCMs \\ 125 MHz external clock | ||
+ | | Internal ADC = Dual-channel, | ||
+ | | Bullet = (*Z7-10 variant value in parentheses where different) | ||
+ | | Header = Connectivity and On-board I/O | ||
+ | | USB = USB-UART \\ USB-JTAG Programmer \\ USB Host | ||
+ | | Ethernet = Gigabit Ethernet PHY | ||
+ | | Pmod Connectors = 2 | ||
+ | | Other Connectors = Arduino/ | ||
+ | | Buttons = 2 Push buttons | ||
+ | | LEDs = 2 RGB LEDs | ||
+ | | Header = Electrical | ||
+ | | Power Inputs = USB \\ 5V External source | ||
+ | | Header = Physical | ||
+ | | Width = 2.28 in (57.9 mm) | ||
+ | | Length = 4.00 in (101.6 mm) | ||
+ | | Header = Design Resources | ||
+ | | Mechanical Drawing = {{: | ||
+ | | Header = Product Compliance | ||
+ | | HTC = 8473301180 | ||
+ | | ECCN = EAR99 | ||
+ | }} | ||
+ | {{page> | ||
+ | |||
+ | ===== Documentation ===== | ||
+ | {{topic> | ||
+ | |||
+ | **Note:** //Xilinx software tools are not available for download in some countries. Prior to purchasing the Cora Z7, please check the supporting software' | ||
+ | |||
+ | |||
+ | ---- | ||
+ | ===== Tutorials ===== | ||
+ | |||
+ | * [[programmable-logic: | ||
+ | * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards. | ||
+ | * [[programmable-logic: | ||
+ | * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs. | ||
+ | * [[programmable-logic: | ||
+ | * Walks through using Vivado to create a simple design that blinks a single LED. | ||
+ | * [[learn/ | ||
+ | * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. | ||
+ | * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. | ||
+ | * [[programmable-logic/ | ||
+ | * [[programmable-logic: | ||
+ | |||
+ | ---- | ||
+ | ===== Example Projects ===== | ||
+ | |||
+ | === Demos Supporting Vivado and Vitis 2022.1 === | ||
+ | * [[./ | ||
+ | * [[./ | ||
+ | * [[./ | ||
+ | === Other Demos === | ||
+ | * [[pmod/ | ||
+ | |||
+ | ---- | ||
+ | ===== Additional Resources ===== | ||
+ | |||
+ | * {{https:// | ||
+ | {{topic> | ||
+ | |||
+ | |||
+ | ---- | ||
+ | |||
+ | {{tag> |