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programmable-logic:arty-z7:start [2022/07/18 10:38] – [Documentation] Add D.0 Schematic Arthur Brown | programmable-logic:arty-z7:start [2023/08/29 16:06] (current) – ↷ Links adapted because of a move operation Arthur Brown | ||
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+ | ~~NOTOC~~ | ||
+ | |||
+ | ====== Arty Z7 ====== | ||
+ | {{Digilent Infobox | ||
+ | | Store Page = https:// | ||
+ | | Manual = [[reference-manual]] | ||
+ | | Support = https:// | ||
+ | | Title = Arty Z7 | ||
+ | | Subtitle = Zynq for Hobbyists and Makers | ||
+ | | Header = Features | ||
+ | | Bullet = Full support for Vivado, SDSoC, and Petalinux design environments | ||
+ | | Bullet = 650MHz dual-core Cortex-A9 processor with tightly integrated Xilinx FPGA | ||
+ | | Bullet = 512 MB DDR3 | ||
+ | | Bullet = Wide range of USB, Ethernet, Video and Audio connectivity | ||
+ | | Bullet = Arduino shield and Pmod connectors for adding-on hardware devices | ||
+ | | Bullet = Programmable from JTAG, Quad-SPI flash, and microSD card | ||
+ | | Header = Key FPGA Specifications | ||
+ | | Part Number = XC7Z020-1CLG400C \\ (XC7Z010-1CLG400C*) | ||
+ | | Logic slices = 13,300 (4,400*) | ||
+ | | 6-input LUTs = 53,200 (17,600*) | ||
+ | | Flip-Flops = 106,400 (35,200*) | ||
+ | | Block RAM = 630 KB (270 KB*) | ||
+ | | DSP Slices = 220 (80*) | ||
+ | | Clock Resources = Zynq PLL with 4 outputs \\ 4 PLLs (2 PLLs*) \\ 4 MMCMs (2 MMCMs*) \\ 125 MHz external clock | ||
+ | | Internal ADC = Dual-channel, | ||
+ | | Bullet = (* -7010 variant value in parentheses when different) | ||
+ | | Header = Connectivity and On-board I/O | ||
+ | | USB = USB-UART \\ USB-JTAG Programmer \\ USB Host | ||
+ | | Ethernet = Gigabit Ethernet PHY | ||
+ | | HDMI = Sink (input) \\ Source (output) | ||
+ | | Audio = PWM driven mono audio output \\ with 3.5 mm jack | ||
+ | | Pmod Connectors = 2 | ||
+ | | Other Connectors = Arduino/ | ||
+ | | Switches = 2 slide switches | ||
+ | | Buttons = 4 Push buttons | ||
+ | | LEDs = 4 LEDs, 2 RGB LEDs | ||
+ | | Header = Electrical | ||
+ | | Power Inputs = USB \\ 7 V - 15 V External source | ||
+ | | Header = Physical | ||
+ | | Width = 3.46 in (88 mm) | ||
+ | | Length = 4.3 in (109.2 mm) | ||
+ | | Header = Design Resources | ||
+ | | Mechanical Drawing = {{: | ||
+ | }} | ||
+ | {{page> | ||
+ | |||
+ | ===== Documentation ===== | ||
+ | {{topic> | ||
+ | |||
+ | * {{https:// | ||
+ | * {{/ | ||
+ | |||
+ | * {{https:// | ||
+ | * {{https:// | ||
+ | |||
+ | **Note:** //Xilinx software tools are not available for download in some countries. Prior to purchasing the Arty Z7, please check the supporting software' | ||
+ | |||
+ | ---- | ||
+ | ===== Tutorials ===== | ||
+ | |||
+ | * [[programmable-logic: | ||
+ | * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards. | ||
+ | * [[programmable-logic: | ||
+ | * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs. | ||
+ | * [[programmable-logic: | ||
+ | * Walks through using Vivado to create a simple design that blinks a single LED. | ||
+ | * [[learn/ | ||
+ | * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. | ||
+ | * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. | ||
+ | * [[programmable-logic/ | ||
+ | * [[programmable-logic: | ||
+ | |||
+ | ---- | ||
+ | ===== Example Projects ===== | ||
+ | {{topic> | ||
+ | |||
+ | ---- | ||
+ | ===== Additional Resources ===== | ||
+ | * [[intro-to-fpga]] | ||
+ | |||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
+ | * {{reference: | ||
+ | * {{: | ||
+ | * OOB bit file {{ : | ||
+ | * {{https:// | ||
+ | | ||
+ | |||
+ | ---- | ||
+ | |||
+ | {{tag> |