Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision		Previous revision
programmable-logic:arty-s7:reference-manual [2022/01/27 00:17] – [Board Revisions] Arthur Brownprogrammable-logic:arty-s7:reference-manual [2023/06/22 21:10] (current) – Arthur Brown
Line 19: Line 19:
  
  
-====== Features ======+===== Features =====
   * **Xilinx Spartan-7 FPGA**   * **Xilinx Spartan-7 FPGA**
     * 8,150 slices containing four 6-input LUTs and 8 flip-flops (3,650 slices*)     * 8,150 slices containing four 6-input LUTs and 8 flip-flops (3,650 slices*)
Line 29: Line 29:
     * Programmable over JTAG and Quad-SPI Flash     * Programmable over JTAG and Quad-SPI Flash
   * **Memory**   * **Memory**
-    * 256MB DDR3L with a 16-bit bus @ 650MHz+    * 256MB DDR3L with a 16-bit bus @ 325MHz (650 MT/s)
     * 16MB Quad-SPI Flash     * 16MB Quad-SPI Flash
   * **Power**   * **Power**
Line 69: Line 69:
 ---- ----
  
-====== Purchasing Options ======+===== Purchasing Options =====
  
 The Arty S7 can be purchased with either a XC7S50 or XC7S25 FPGA loaded. These two Arty S7 product variants are referred to as the Arty S7-50 and Arty S7-25, respectively. When Digilent documentation describes functionality that is common to both of these variants, they are referred to collectively as the "Arty S7". When describing something that is only common to a specific variant, the variant will be explicitly called out by its name. The Arty S7 can be purchased with either a XC7S50 or XC7S25 FPGA loaded. These two Arty S7 product variants are referred to as the Arty S7-50 and Arty S7-25, respectively. When Digilent documentation describes functionality that is common to both of these variants, they are referred to collectively as the "Arty S7". When describing something that is only common to a specific variant, the variant will be explicitly called out by its name.
Line 86: Line 86:
 ---- ----
  
-====== Board Revisions ======+===== Board Revisions =====
  
-Since the release of the Arty S7-50, several changes have been made to its design to ease the manufacturing of Arty S7-25 and S7-50 variants. At the time of writing, a purchased Arty S7-50 may arrive in the form of either a Revision C or a Revision E of the board. These revisions have no substantial difference in capabilities, however there several design differences that are described in this manual. The revision of each board is printed on the underside of the board, near the white bar-code sticker, as seen in the figure below.+Since the release of the Arty S7-50, several changes have been made to its design to ease the manufacturing of Arty S7-25 and S7-50 variants. At the time of writing, a purchased Arty S7-50 may arrive in the form of either a Revision C or a Revision E of the board. These revisions have no difference in capabilities, however there several design differences that are described in this manual. The revision of each board is printed on the underside of the board, near the white bar-code sticker, as seen in the figure below.
  
 {{ :reference:programmable-logic:arty-s7:arty-s7-bottom-rev.png?500 |}} {{ :reference:programmable-logic:arty-s7:arty-s7-bottom-rev.png?500 |}}
  
 ---- ----
-====== Software Support ======+===== Software Support =====
  
 The Arty S7 is fully compatible with the high-performance Vivado ® Design Suite versions 2017.3 and newer. It is supported under the free WebPACK™ installation option - which does not require a license - so designs can be implemented at no additional cost. This free license includes the ability to create MicroBlaze™ soft-core processor designs, the Logic Analyzer, and High-level Synthesis (HLS). The Logic Analyzer assists with debugging logic, and the HLS tool allows you to compile C code directly into HDL. Design resources, example projects, and tutorials are available for download at the [[programmable-logic:arty-s7:start|Arty S7 Resource Center]]. The Arty S7 is fully compatible with the high-performance Vivado ® Design Suite versions 2017.3 and newer. It is supported under the free WebPACK™ installation option - which does not require a license - so designs can be implemented at no additional cost. This free license includes the ability to create MicroBlaze™ soft-core processor designs, the Logic Analyzer, and High-level Synthesis (HLS). The Logic Analyzer assists with debugging logic, and the HLS tool allows you to compile C code directly into HDL. Design resources, example projects, and tutorials are available for download at the [[programmable-logic:arty-s7:start|Arty S7 Resource Center]].
Line 99: Line 99:
 ---- ----
  
-====== Designing with MicroBlaze ======+===== Designing with MicroBlaze =====
  
 {{ arty:arty_vivadoipi.png?600| Vivado IPI}} {{ arty:arty_vivadoipi.png?600| Vivado IPI}}
Line 115: Line 115:
 ---- ----
  
-====== Functional Description ======+===== Functional Description =====
  
 ===== 1 Power Supplies ===== ===== 1 Power Supplies =====
Line 123: Line 123:
 The Arty S7 board requires a 5 volt power source to operate. This power source can come from the Digilent USB-JTAG port (J10) or it can be derived from a 7 to 15 Volt DC power supply connected to the Power Jack (J13) or Pin 8 of Header J8. The Arty S7 board requires a 5 volt power source to operate. This power source can come from the Digilent USB-JTAG port (J10) or it can be derived from a 7 to 15 Volt DC power supply connected to the Power Jack (J13) or Pin 8 of Header J8.
  
-A power-good LED (LD9), driven by the 3.3 output (VCC3V3) output of the DA9062 regulator, indicates that the board is receiving power and that the onboard supplies are functioning as expected. If this LED does not illuminate when an acceptable power supply is connected, please contact your distributor or [[http://forum.digilentinc.com|Digilent Support]] for further help.+A power-good LED (LD9), driven by the 3.3 output (VCC3V3) output of the DA9062 regulator, indicates that the board is receiving power and that the onboard supplies are functioning as expected. If this LED does not illuminate when an acceptable power supply is connected, please contact your distributor or [[http://forum.digilent.com|Digilent Support]] for further help.
  
 An overview of the Arty S7 power circuit is shown below. An overview of the Arty S7 power circuit is shown below.
Line 211: Line 211:
 | **Setting**                         | **Value**                   | | **Setting**                         | **Value**                   |
 | Memory type                         | DDR3 SDRAM                  | | Memory type                         | DDR3 SDRAM                  |
-| Max. clock period                   | 3077ps (650Mbps data rate)  |+| Max. clock period                   | 3077ps (325 MT/s data rate)  |
 | Memory part                         | MT41K128M16XX-15E           | | Memory part                         | MT41K128M16XX-15E           |
 | Memory Voltage                      | 1.35V                       | | Memory Voltage                      | 1.35V                       |
Line 258: Line 258:
  
 **Note:** //Refer to the manufacturer’s data sheets[([[https://www.infineon.com/dgdl/Infineon-S25FL128S_S25FL256S_128_Mb_(16_MB)_256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v18_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files|Spansion S25FL128S Datasheet]] **Note:** //Refer to the manufacturer’s data sheets[([[https://www.infineon.com/dgdl/Infineon-S25FL128S_S25FL256S_128_Mb_(16_MB)_256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v18_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files|Spansion S25FL128S Datasheet]]
-[[https://www.infineon.com/dgdl/Infineon-S25FL127S_128-Mb_(16_MB)_3.0_V_SPI_Flash_Memory-DataSheet-v11_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfa58c49f7&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-datasheet|Spansion S25FL127S Datasheet]])] ​ and Xilinx user guides[([[http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf|7-Series FPGAs Configuration User Guide from Xilinx]])] ​ for more information.//+[[https://www.infineon.com/dgdl/Infineon-S25FL127S_128-Mb_(16_MB)_3.0_V_SPI_Flash_Memory-DataSheet-v11_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfa58c49f7&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-datasheet|Spansion S25FL127S Datasheet]])] ​ and Xilinx user guides[([[https://docs.xilinx.com/v/u/en-US/ug470_7Series_Config|7-Series FPGAs Configuration User Guide from Xilinx]])] ​ for more information.//
  
 {{ :reference:programmable-logic:arty-s7:arty-s7-flash.png?550 |Figure 4.1. Arty S7 Quad SPI flash.}} {{ :reference:programmable-logic:arty-s7:arty-s7-flash.png?550 |Figure 4.1. Arty S7 Quad SPI flash.}}
Line 405: Line 405:
 //Table 9.1.1. Shield Voltage Specifications// //Table 9.1.1. Shield Voltage Specifications//
  
-For more information on the electrical characteristics of the pins connected to the FPGA, please see the [[https://www.xilinx.com/support/documentation/data_sheets/ds189-spartan-7-data-sheet.pdf|Spartan-7 datasheet]] from Xilinx.+For more information on the electrical characteristics of the pins connected to the FPGA, please see the [[https://docs.xilinx.com/v/u/en-US/ds189-spartan-7-data-sheet|Spartan-7 datasheet]] from Xilinx.
  
 The pins on the shield connector typically used for I2C signals are labeled as SCL and SDA. When using these signals to implement an I2C bus it is necessary to attach a pull-up resistor to them. On the Arty S7, this can be done by placing two shorting blocks horizontally across the J4 header. The pins on the shield connector typically used for I2C signals are labeled as SCL and SDA. When using these signals to implement an I2C bus it is necessary to attach a pull-up resistor to them. On the Arty S7, this can be done by placing two shorting blocks horizontally across the J4 header.