This is an old revision of the document!


Arty S7 XADC Demo

Under Construction


Description

This simple XADC demo project demonstrates a simple usage of the Arty S7's XADC pin capability. The behavior is as follows:

  • The 6 User LEDs increment from top right to left then bottom right to left as the voltage difference on the selected XADC pins gets larger.
  • The four switches select which channel to read from.

Inventory


Download and Usage Instructions

First and foremost, releases - consisting of a set of files for download - are only compatible with a specific version of the Xilinx tools, as specified in the name of the release (referred to as a release tag). In addition, releases are only compatible with the specified variant of the board. For example, a release tagged “20/DMA/2020.1” for the Zybo Z7 is only to be used with the -20 variant of the board and Vivado 2020.1.

The latest release version for this demo is highlighted in green.

Note: Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.

Board Variant Release Tag Release Downloads Setup Instructions
Arty S7-25 25/XADC/2020.1-1 Release ZIP Downloads See Using the Latest Release, below
Arty S7-50 50/XADC/2020.1-1 Release ZIP Downloads See Using the Latest Release, below
Arty S7-25 v2018.2-1 Release ZIP Downloads v2018.2-1 Github README
Arty S7-50 v2018.2-1 Release ZIP Downloads v2018.2-1 Github README

Note for Advanced Users: All demos for the Arty S7 are provided through the Arty-S7 repository on Github. Further documentation on the structure of this repository can be found on this wiki's Digilent FPGA Demo Git Repositories (Redirect) page.


Instructions on the use of the latest release can be found in this dropdown:

Using the Latest Release
This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).
Set up the Arty S7
Plug the microUSB programming cable into the Arty S7's PROG/UART port. Set up the circuit that you want to measure
This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).

At this point, the demo is now running on your board. Refer to the Description and Functionality sections of this document for more information on what it does.


Functionality

Applying a Voltage to the XADC Port

For this demo, A0-A5 are single-ended analog inputs while A6-A7, A8-A9, and V_P-V_N are differential analog input pairs.

Important

The Voltage range for differential analog input pairs is 0-1V and the range for single-ended analog inputs is 0-3.3V. For the pairs, A6, A8, and V_P are the positive inputs and A7, A9, and V_N are the negative inputs.


LEDs

The LEDs turn on from right to left then continue onto the bottom as the input voltage increases.

XADC Demo with Analog Input 0 (Single-Ended) receiving 0.0V, 2.0V, 3.3V


Selecting a Channel

To display a different channel on the LEDs, change the user switches to the desired channel. The drop-downs below contain tables that show the switch positions that correspond to each analog input for each of the variants of the Arty S7.

Arty S7-50
Channel Pin/s SW3 SW2 SW1 SW0
A0 Down Down Down Down
A1 Down Down Down Up
A2 Down Down Up Down
A3 Down Down Up Up
A4 Down Up Down Down
A5 Down Up Down Up
A6-A7 Down Up Up Down
A8-A9 Down Up Up Up
V_P-V_N Up Down Down Down
None Other Values
Arty S7-25
Channel Pin/s SW3 SW2 SW1 SW0
A0 Down Down Down Down
A1 Down Down Down Up
A2 Down Down Up Down
A3 Down Down Up Up
A4 Down Up Down Down
A5 Down Up Down Up
A6-A7 Down Up Up Down
A8-A9 Down Up Up Up
A10-A11 Up Down Down Down
V_P-V_N Up Down Down Up
None Other Values

Additional Resources

All materials related to the use of the Arty S7 can be found on its Resource Center.

For a walkthrough of the process of creating a simple HDL project in Vivado, see Getting Started with Vivado for Hardware-Only Designs (Redirect). Information on important parts of the GUI, and indirect discussion of the steps required to modify, rebuild, and run this demo in hardware can also be found here.

For technical support, please visit the FPGA section of the Digilent Forum.


{{tag>project arty-s7}}