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pmod:pmodsf3:start [2022/02/13 16:27] – Keith M Kolmospmod:pmodsf3:start [2022/09/08 14:05] (current) – changed forum.digilentinc.com to forum.digilent.com Jeffrey
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 | Store Page = https://digilent.com/shop/pmod-sf3-32-mb-serial-nor-flash/ | Store Page = https://digilent.com/shop/pmod-sf3-32-mb-serial-nor-flash/
 | Manual = [[reference:pmod:pmodsf3:reference-manual]] | Manual = [[reference:pmod:pmodsf3:reference-manual]]
-| Support = https://forum.digilentinc.com/forum/7-add-on-boards/+| Support = https://forum.digilent.com/forum/7-add-on-boards/
 | Title = Pmod SF3 | Title = Pmod SF3
 | Subtitle = 32MB Serial NOR Flash | Subtitle = 32MB Serial NOR Flash
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 ----  ---- 
  
-===== Tutorials ===== 
-  * [[learn/software/tutorials/digilent-core-install/start | Installing the Digilent Core for Arduino]] 
-  * [[learn/programmable-logic/tutorials/pmod-ips/start | Getting Started with Digilent Pmod IPs]] 
- 
- 
----- 
  
 ===== Example Projects ===== ===== Example Projects =====
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 ==Programmable Logic== ==Programmable Logic==
-  * Arty A7 100T project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20419-spi-memory-tester-ipi-bd-and-vhdl/|Forum thread]] +  * Arty A7 100T project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilent.com/topic/20419-spi-memory-tester-ipi-bd-and-vhdl/|Forum thread]] 
-  * Zybo Z7-20 project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20460-spi-memory-tester-ipi-bd-for-zynq/|Forum thread]]+  * Zybo Z7-20 project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilent.com/topic/20460-spi-memory-tester-ipi-bd-for-zynq/|Forum thread]]
   * [[learn/programmable-logic/tutorials/pmod-ips/start | Getting Started with Digilent Pmod IPs]]   * [[learn/programmable-logic/tutorials/pmod-ips/start | Getting Started with Digilent Pmod IPs]]
 +     * Digilent Pmod IPs are only supported in Vivado and Xilinx SDK versions 2019.1 and earlier.