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playground:vivado_github_demo_startup_rework [2017/05/08 18:15] – [Overview] Arthur Brown | playground:vivado_github_demo_startup_rework [2022/03/04 20:49] (current) – redirected to offical page James Colvin | ||
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- | ====== Using Github | + | ====== Using Digilent |
- | ===== Overview ===== | + | |
- | Digilent provides several projects through Github that are designed to demonstrate different uses of our FPGA and Zynq boards. This guide will describe how to download and use these projects. | + | |
- | At the end of this tutorial you will have your demo project running on your board. | + | ~~REDIRECT> |
- | ----- | + | ~~NOSEMANTIC~~ |
- | ===== Prerequisites ===== | + | {{tag>redirect}} |
- | + | ||
- | === Hardware === | + | |
- | * **A Supported Digilent 7-Series FPGA or Zynq Board** | + | |
- | * **USB Cables** | + | |
- | + | ||
- | === Software === | + | |
- | * **Xilinx Vivado 2016.X** | + | |
- | * //Vivado 2016.4 is used in this tutorial// | + | |
- | * **Digilent Board Support Files** | + | |
- | * //Follow the **[[vivado: | + | |
- | + | ||
- | + | ||
- | --> Projects Supported by this Tutorial# | + | |
- | + | ||
- | ^ Platform ^ Project Name ^ Uses SDK ^ Hardware Handoff Available ^ Wiki Link ^ Github Link ^ | + | |
- | | Arty | Pmod VGA Demo | No | No | [[https:// | + | |
- | + | ||
- | <-- | + | |
- | + | ||
- | + | ||
- | + | ||
- | <WRAP round important 660px> | + | |
- | ===Important=== | + | |
- | For further requirements, | + | |
- | </ | + | |
- | + | ||
- | ----- | + | |
- | + | ||
- | + | ||
- | =====Tutorial===== | + | |
- | + | ||
- | ====1. Download the Project ZIP from the Digilent Github ==== | + | |
- | >1.1) From the demo repository landing page, select the **release** link. | + | |
- | > | + | |
- | >{{: | + | |
- | + | ||
- | >1.2) If the repository has multiple releases, select **Latest Release**, then click on the project ZIP file included in the Downloads section of the release to download it. | + | |
- | > | + | |
- | >< | + | |
- | ===Important=== | + | |
- | Make sure that you download the project-2016.4-x.zip, | + | |
- | </ | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >1.3) All of the necessary files are included within each project folder, with relative file paths established, | + | |
- | + | ||
- | ----- | + | |
- | + | ||
- | ====2. Find the Location of the Tcl Script ==== | + | |
- | + | ||
- | >Within the project folder there will be several subfolders named " | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | ====3. Create the Project in Vivado ==== | + | |
- | + | ||
- | >3.1) Open Vivado and find the Tcl Console on the bottom of the window. Enter the letters ' | + | |
- | > | + | |
- | >< | + | |
- | ===Important=== | + | |
- | Select the proj folder from the drop-down menu to make sure that Vivado converts the path's back slashes ' / ' to forward slashes ' \ '. Vivado will not recognize the path otherwise. | + | |
- | </ | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >3.2) Enter the command " | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >3.3) The project will now be open in Vivado and you can navigate through the **Design Sources** subwindow or select **Open Block Design** in the project flow manager to the left to see how the project hardware works. (Not all projects will have a block design) | + | |
- | + | ||
- | ----- | + | |
- | + | ||
- | + | ||
- | ====4. Program ==== | + | |
- | + | ||
- | --> HDL-Only# | + | |
- | + | ||
- | >4.1) Click **Generate Bitstream** on the left hand menu towards the bottom. In the " | + | |
- | > | + | |
- | >< | + | |
- | ===Tip=== | + | |
- | If your computer has multiple cores, you can increase the number of jobs to make this process faster. | + | |
- | </ | + | |
- | > | + | |
- | + | ||
- | >4.2) When this process has finished, which may take a while, in the " | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >4.3) After the last step, if you don't have the hardware manager opened, select **Hardware Manager** from the Program and Debug section of the Flow Navigator to the left, just underneath **Generate Bitstream**. | + | |
- | + | ||
- | >4.4) Select **Open Target** from the green bar at the top. In the drop down menu that this creates, select **Open New Target**. | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >4.5) Click **Next**. Then make sure that **Local server** is selected in the " | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >4.6) Click **Next** and click **Finish**. | + | |
- | > | + | |
- | > | + | |
- | + | ||
- | >4.7) Select **Program Device** from the green bar, then select your device from the dropdown list (there will usually only be one device listed). | + | |
- | > | + | |
- | >< | + | |
- | ===Important=== | + | |
- | If nothing shows up in the " | + | |
- | </ | + | |
- | > | + | |
- | + | ||
- | <-- | + | |
- | + | ||
- | --> SDK# | + | |
- | + | ||
- | >4.1) Export Hardware - Include Bitsream | + | |
- | + | ||
- | >4.2) Launch SDK | + | |
- | + | ||
- | >4.3) Compile | + | |
- | + | ||
- | >4.4) Import? | + | |
- | + | ||
- | >4.5) Build All | + | |
- | + | ||
- | >4.6) Make sure that your board is turned on and connected to the host PC via both the JTAG USB port and the UART USB port. | + | |
- | + | ||
- | >4.7) On the top toolbar, click the Program FPGA button. | + | |
- | + | ||
- | >4.8) Click Program to program your FPGA with your hardware design. | + | |
- | + | ||
- | >4.9) Select your Pmods project and click the Run As… button. Select Launch on Hardware (System Debugger) and click OK. | + | |
- | + | ||
- | <-- | + | |
- | + | ||
- | ----- | + | |