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learn:programmable-logic:tutorials:zybo-dma-audio-demo:start [2016/09/06 17:28] – Sam Lowelearn:programmable-logic:tutorials:zybo-dma-audio-demo:start [2019/03/12 17:22] (current) – Arthur Brown
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 ====== Zybo DMA Audio Demo ====== ====== Zybo DMA Audio Demo ======
  
 +{{:zybo:zybo_revb-box-600.png?direct&500|}}
  
 ----- -----
 ===== Overview ===== ===== Overview =====
 +===== Description =====
 +
 +The audio demo records a 5 second sample from microphone(J6) or line in (J7) and plays it back on a headphone out(J5). Recording and playback are started by push buttons.
 +
 ==== Features Used ==== ==== Features Used ====
  
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 ^ Pmod for XADC signals            |    X      |       | ^ Pmod for XADC signals            |    X      |       |
 ^ USB HID Host                     |    X      |       | ^ USB HID Host                     |    X      |       |
- 
-===== Description ===== 
- 
-The audio demo records a 5 second sample from microphone(J6) or line in (J7) and plays it back on a headphone out(J5). Record and playback is started by push buttons: 
-^  Button  ^  Function          ^ 
-^  BTN1    |  record from mic in   | 
-^  BTN2    |  play on hph out     | 
-^  BTN3    |  record from line in  | 
- 
  
 ===== Prerequisites ===== ===== Prerequisites =====
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 ===Hardware=== ===Hardware===
-  * **Zybo FPGA board**+  * **Zybo Zynq board**
   * **Micro-USB cable**   * **Micro-USB cable**
   * **Headphones or Speakers**   * **Headphones or Speakers**
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 ===Software=== ===Software===
-  * **Vivado Design Suite 2016.X**  +  * **Vivado Design Suite 2016.4** 
-    * //Newer/older versions can be used, but the procedure may vary slightly// +  * **Digilent Board Support Files for Vivado**  
- +    * Follow the [[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]] guide on how to install Board Support Files for Vivado.
- +
-==== 1. Setup ==== +
- +
-Plug in your microphone or aux input into the respective jack on your Zedboard. Plug your speakers/headphones into the Line out jack. Plug in your Zybo and power it on.+
  
 ===== Downloads ===== ===== Downloads =====
-Zybo Support Repository -- [[https://github.com/Digilent/Zybo/archive/master.zip|ZIP]] [[https://github.com/Digilent/Zybo|GIT Repo]]+Zybo DMA Audio Project Repository -- [[https://github.com/Digilent/Zybo-DMA/releases/download/v2016.4-3/Zybo-DMA-2016.4-3.zip|ZIP Archive]] [[https://github.com/Digilent/Zybo-DMA|GIT Repo]]
  
 ------ ------
-===== How to... =====+===== Download and Launch the Zybo DMA Audio Demo =====
  
-==== 1. Download the Project ====+>1) Follow the [[:learn:programmable-logic:tutorials:github-demos:start:|Using Digilent Github Demo Projects]] Tutorial. Since this is a Vivado SDK Project, you can either directly launch SDK and import the hardware handoff, or you can generate a bitstream in Vivado before launching SDK. Select the hardware handoff options in the tutorial if you don't want to modify the project block design later. Return to this guide when prompted to check for additional hardware requirements and setup.
  
->1.1) Download the project zip file which can be downloaded {{https://github.com/Digilent/Zybo/archive/master.zip|here}}. Once you have downloaded the project, unzip it in the location of your choosing. +>2) In order to use the demo, you will need to plug in your microphone or aux input into the respective jack on your Zybo. Plug your speakers/headphones into the Line out jack.
- +
->1.2) If you want to generate the project in Vivado, continue to step 2. If you want to move straight to Xilinx SDK, skip to step 5. +
- +
-==== 2. Generate the Project ==== +
->2.1) If not already installed, install the Vivado Board Files for the Zedboard by following this guide: [[vivado:boardfiles| Installing Vivado Board Files for Digilent Boards]]. +
- +
->2.2) Generate the **dma** project in the Projects folder by following this guide before continuing: [[vivado:github|How to Generate a Project from Digilent's Github]]. **NOTE**: This must be done in Vivado 2016.2 +
- +
-==== 3. Build the Project ==== +
- +
->3.1) Click **Generate Bitstream** on the left hand menu towards the bottom. Vivado will run through both Run Synthesis and Run Implementation before it generates the bitstream automatically. +
 > >
->Note: If you want, you can click each step by itself in the order of **Run Synthesis**, **Run Implementation** and then **Generate Bitstream**. +>{{:playground:dma-zybo.jpg?400|}}
-> +
->{{:basys3:buildflow.png?600|}}+
  
- +>3) Turn on your board and open a serial terminal (such as TeraTerm) on your computer to receive status messages. Setup the serial port to connect to the appropriate port for your board, with a baud rate of 115200. Then return to the Github Project Tutorial to finish programming and running the demo.
-==== 4. Export to SDK ==== +
- +
->4.1) Export the microblaze project by going to **File->Export->Export Hardware**. Click the check box to Include the bitstream, and export it local to project. This will create a .sdk folder in your project directory. Afterwards, click **File->Launch SDK**. Both the exported location and workspace should be left as <Local to Project>. Click "OK" to launch Xilinx SDK.+
 > >
->4.2) Skip to step 6. +><WRAP round tip 660px>  
- +===Tip=== 
-==== 5. Open Xilinx SDK and create a workspace ==== +You can connect your serial terminal to your board before the board is programmed, this will make sure that you don't miss any startup messages. If the demo is already running, you can restart the demo in SDK to make sure you get these messages. 
- +</WRAP>
->5.1) Open up Xilinx SDK and create a workspace where your project will be saved.+
 > >
->{{:genesys2:1.jpg?500|}}+>{{:playground:dma-tera.png?400|}}
  
-==== 6. Import the SDK files ====+===== Using the Zybo DMA Audio Demo =====
  
->6.1) In your project Explorer window on the left side, click **File->Import**, then under the general folder, select Existing projects. (Or just click **Import Project** on the main screen). 
-> 
->{{:genesys2:2.jpg?500|}} 
  
->6.2) Navigate to where you saved the downloaded project, select the **sdk** folder, and click OK. In the //Import// window, click Finish to import the system hardware wrapper. +==== 1. Controls ====
-> +
->{{:genesys2:3.jpg?300|}}+
  
->6.3) Import the projects by clicking //Finish//. You can ignore the warnings that may pop up. +Audio playback and recording are controlled by push buttons as below.
-> +
->{{:genesys2:4.jpg?500|}}+
  
-==== 7. Program the FPGA ==== +^  Button  ^  Function             ^ 
- +^  BTN0    |  no effect            | 
->7.1) Click **Xilinx Tools->Program FPGA** and click **Program**. Xilinx SDK will then program the FPGA with a bit file. +^  BTN1    |  record from mic in   | 
-> +^  BTN2    |  play on hph out      | 
->{{:genesys2:5.jpg?500|}} +^  BTN3    |  record from line in  |
- +
-==== 8. Program the Zynq processor ==== +
- +
->8.1) Right click on the **demo** folder and click  **Run as->Launch on Hardware(GDB)**. The microblaze program will be programmed onto your Zybo. +
-> +
->{{:genesys2:6.jpg?500|}} +
- +
-===== Running the Zedboard DMA Audio Demo ===== +
- +
-This portion will help you run the demo and observe all its features.+
  
-==== 1. Recording from an input ====+==== 2. Recording from an input ====
  
-To record from the microphone input, press btn1. To record from the line input, press btn3. Once the recording is activated, the message "Start Recording..." will be sent over UART and the demo will record 5 seconds of audio. If any buttons are pressed during the recording, the message "Still Recording..." will be sent over UART.+To record from the microphone input, press **BTN1**. To record from the line input, press **BTN3**. Once the recording is activated, the message "Start Recording..." will be sent over UART and the demo will record 5 seconds of audio. If any buttons are pressed during the recording, the message "Still Recording..." will be sent over UART.
  
-==== 2. Playing to an output ====+==== 3. Playing to an output ====
  
-To play to the headphone output, press btn2. Once the playback is activated, the message "Start Playback..." will be sent over UART and the demo will play 5 seconds of audio. If any buttons are pressed during the playback, the message "Still Playing..." will be sent over UART.+To play to the headphone output, press **BTN2**. Once the playback is activated, the message "Start Playback..." will be sent over UART and the demo will play 5 seconds of audio. If any buttons are pressed during the playback, the message "Still Playing..." will be sent over UART.
  
-{{tag>learn programmable-logic tutorial Zybo}}+{{tag>learn programmable-logic project Zybo}}