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learn:programmable-logic:tutorials:use-flip-flops-to-build-a-clock-divider:start [2022/03/31 21:42] – remove basys 3 tag to prevent this from showing up in example projects there Arthur Brown | learn:programmable-logic:tutorials:use-flip-flops-to-build-a-clock-divider:start [2023/04/18 16:06] (current) – [Prerequisites] Martha | ||
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===== Prerequisites ==== | ===== Prerequisites ==== | ||
* Have the Xilinx ISE WebPACK installed. | * Have the Xilinx ISE WebPACK installed. | ||
- | * Set up your FPGA board. | + | * Set up your [[https:// |
* Be able to describe a digital circuit using logic operators. | * Be able to describe a digital circuit using logic operators. | ||
* Be able to write test bench and simulate circuits using ISim. | * Be able to write test bench and simulate circuits using ISim. |