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learn:programmable-logic:tutorials:htsspisf:start [2021/01/21 09:22] – Ana-Maria-Eliza Balaslearn:programmable-logic:tutorials:htsspisf:start [2022/08/01 22:47] (current) – Made note that this guide is only compatible with 2019.1 and older. Will need a newer guide James Colvin
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 This guide requires the existence of a Vivado project containing a Microblaze system built complete with **Quad SPI**, **External Memory**, and **Uart** cores, and that you have the appropriate QSPI mode jumper setting on the board. This guide requires the existence of a Vivado project containing a Microblaze system built complete with **Quad SPI**, **External Memory**, and **Uart** cores, and that you have the appropriate QSPI mode jumper setting on the board.
-You can follow the steps presented in the  [[https://reference.digilentinc.com/learn/programmable-logic/tutorials/nexys-4-ddr-getting-started-with-microblaze/start#prerequisites|Microblaze tutorial]], and see below the missing steps for adding QSPI Flash and perform all the connections.+You can follow the steps presented in the  [[/learn/programmable-logic/tutorials/nexys-4-ddr-getting-started-with-microblaze/start#prerequisites|Microblaze tutorial]], and see below the missing steps for adding QSPI Flash and perform all the connections.
 Since there are slight differences in the Vivado 2019.1 and the version in which the Microblaze tutorial was created, the user needs to check all the connections in the block design to make sure that are correctly made or present. Since there are slight differences in the Vivado 2019.1 and the version in which the Microblaze tutorial was created, the user needs to check all the connections in the block design to make sure that are correctly made or present.
 === Hardware === === Hardware ===
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 === Software === === Software ===
   * **Xilinx Vivado 2019.1 with the SDK package.**    * **Xilinx Vivado 2019.1 with the SDK package.** 
 +
  
 === Board Support Files === === Board Support Files ===
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     * //These files will describe GPIO interfaces on your board and make it easier to select your FPGA board and add GPIO IP blocks//     * //These files will describe GPIO interfaces on your board and make it easier to select your FPGA board and add GPIO IP blocks//
     * //Follow this Wiki guide ([[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]]  ) on how to install Board Support Files for Vivado//     * //Follow this Wiki guide ([[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]]  ) on how to install Board Support Files for Vivado//
 +
 +<WRAP center round important 80%>
 +The xilisf library was officially depreciated by Xilinx starting in 2019.2 with the release of Vitis. This guide is only directly compatible with 2019.1 and older versions of the Xilinx software.
 +</WRAP>
  
  
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 </WRAP> </WRAP>
  
-Make sure to re-build the application after making these changes.+  * Make sure to re-build the application after making these changes.
  
 === 3. Program FPGA with bootloader === === 3. Program FPGA with bootloader ===