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learn:programmable-logic:tutorials:add_fpgas_to_multisim:start [2022/09/08 20:36] – changed forum.digilentinc.com to forum.digilent.com Jeffreylearn:programmable-logic:tutorials:add_fpgas_to_multisim:start [2023/10/18 19:23] (current) – Alyssa Holzer
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 +====== Adding Digilent FPGA Boards to Multisim ======
 +
 +<WRAP group>
 +This guide will provide a step by step tutorial of how to add a Digilent FPGA board to Multisim. To program your FPGA board through Multisim, follow this guide: [[learn:programmable-logic:tutorials:program_fpgas_through_multisim:start|]].
 +</WRAP>
 +----
 +
 +===== Prerequisites =====
 +<WRAP group>
 +  * a [[https://digilent.com/shop/boards-and-components/system-boards/|Digilent FPGA trainer board]]
 +  * [[https://www.ni.com/ro-ro/support/downloads/software-products/download.multisim.html#312060|Multisim Education]] version 14.2 or higher
 +  * Your favorite text editor
 +  * [[https://www.xilinx.com/products/design-tools/vivado.html|Xilinx Vivado]]
 +    * Only needed for compiling, projects for boards not included originally in Multisim, can't be compiled by LabVIEW FPGA Compilation Tools.
 +  * [[https://cloud.digilent.com/myproducts/Adept?pc=1|Adept]]
 +    * Optional: Can be used to determine your board's FPGA part.
 +
 +**Note:** //This same process can be applied to earlier FPGA boards, but instead of Vivado, [[https://www.xilinx.com/products/design-tools/ise-design-suite.html|Xilinx ISE]] is required. This tutorial will only focus on utilizing Vivado.//
 +</WRAP>
 +----
 +
 +===== Creating and Editing the Configuration Files =====
 +==== Download the Constraints File ====
 +<WRAP group><WRAP half column>
 +Multisim needs two configuration files specific to the chosen FPGA board. These two are an ***.xdc** and a ***.mspc** file. The xdc file is called a constraints file (standing for Xilinx Design Constraints) and contains the location constraints assigning physical FPGA chip pins to port names in HDL code. You can also think of this file like the name definitions for physical pins, so later, in your "code" you only have to use the name, not the pin number. For more information on constraints files, read: [[programmable-logic:guides:vivado-xdc-file|]].
 +
 +For Digilent boards, you can find the xdc file specific to your board on the board's resource center, or, for all boards actively supported in Vivado, in the [[https://github.com/Digilent/digilent-xdc|digilent-xdc]] repository on Github. You can get a ZIP file containing all of the most recent versions of the XDC files in digilent-xdc here: {{https://github.com/Digilent/digilent-xdc/archive/refs/heads/master.zip}}. Download the file for your board.
 +
 +**Note:** //In this guide, an Arty-S7-50 will be used.//
 +
 +**Note:** //If you are using an earlier board, compatible with Xilinx ISE, instead of the xdc file, you will need a //***.ucf**// file.//
 +</WRAP><WRAP half column>
 +{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:xdc_file.png?600 |}}
 +</WRAP></WRAP>
 +
 +==== Create the Configuration File ====
 +<WRAP group><WRAP half column>
 +Open the downloaded constraints file in a text editor, then create an empty file with the same base name and the ***.mspc** extension (replacing the ".xdc"). This file will contain the available pins in Multisim PLD design.
 +
 +First, create the header and the "body" of the file. The language is similar to HTML, and is easily readable. For the file to be compatible with your board, you will have to change the **Name**, **PartNumber**, **BoardName**, **Family**, **Device**, **Package**, and **Ucf** fields. You can leave the other fields as they are.
 +</WRAP><WRAP half column>
 +<code html>
 +<PLDConfiguration Version="1.0">
 +    <Component Name="Digilent Arty S7-50" PartNumber="XC7S50" Version="1.0" OpVoltageInput="3.3" OpVoltageOutput="3.3" OpVoltageBidirectional="3.3" BoardId="">
 + <DeviceList BoardName="Digilent Arty S7-50">
 + <XilinxDevice Manufacturer="Xilinx" Family="Spartan-7" Device="XC7S50" Package="CSGA324" Speed="-1" DeviceOffset="1" DeviceId="" Ucf="Arty-S7-50-Master.xdc" />
 + </DeviceList>
 + <ProgrammingProperties>
 + <Interface CableTarget="digilent_plugin"/>
 + </ProgrammingProperties>
 + <Pins Locked="1">
 +
 +        </Pins>
 + </Component>
 +</PLDConfiguration>
 +</code>
 +</WRAP></WRAP>
 +
 +<WRAP group><WRAP half column>
 +The **Name** and **BoardName** fields contain the name of the board. This is how the board will appear in Multisim.
 +
 +The **PartNumber** and **Device** fields contain the name of the FPGA chip. This usually can be found in the board's Reference Manual, or you can find it by plugging in the board and starting [[https://cloud.digilent.com/myproducts/Adept?pc=1|Adept]].
 +
 +The **Family** of the FPGA chip appears in the board's Reference Manual. In this case, a Spartan-7 FPGA is used.
 +
 +The **Ucf** field contains the name of the xdc file.
 +</WRAP><WRAP half column>
 +{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:adept_arty-s7.png?600 |}}
 +</WRAP></WRAP>
 +
 +<WRAP group><WRAP half column>
 +The trickiest property is the **Package**. You can check the Resource Center's feature list (linked from the [[/programmable-logic/start]] page of this site), search the Reference Manual for information about the package of the chip, or take a look on the chip itself or the sticker placed on the chip (the sticker might contain other information as well).
 +</WRAP><WRAP half column>
 +{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:arty-s7.jpg?600 |}}
 +</WRAP></WRAP>
 +
 +==== Modify the Constraints File ====
 +<WRAP group><WRAP half column>
 +In the constraints file, uncomment the lines describing the resources you want to use by deleting the "#" mark at the beginning of each of the lines. Also change the name of these pins to names you can easily remember (the names shouldn't contain special characters).
 +
 +**Note:** //You can uncomment every resource, as long as there aren't any conflicts: shared pins for multiple resources, like ADC and digital I/O - conflicts are mentioned in the xdc file, in comments.//
 +</WRAP><WRAP half column>
 +{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:xdc_modified_low_res.png?600 |}}
 +</WRAP></WRAP>
 +
 +==== Fill in the Configuration File ====
 +<WRAP group><WRAP half column>
 +The final step is to add the pins to Multisim, which can be done by adding the line below to the mspc file, for every pin.
 +
 +<code html><Pin Name="pin_name" Mode="pin_mode" Location="pin_location" Place="pin_placed" /></code>
 +
 +In the code snippet, **pin_name** marks the name of the pin (which was set in the xdc file), **pin_mode** marks the mode in which the pin will be used (it can have the values **"in"**, **"out"**, or **"bidir"**), **pin_location** can be **"right"** or **"left"**, depending on which part of the sheet you want to place the pin on (they can be moved freely later) and **pin_placed** marks if the pin is selected by default or not (can have the values **"1"** or **"0"**).
 +</WRAP><WRAP half column>
 +{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:mspc_low_res.png?600 |}}
 +</WRAP></WRAP>
 +----
 +
 +===== Adding the Configuration Files to Multisim =====
 +<WRAP group><WRAP half column>
 +To make your configuration files available for Multisim, copy both files to the **pldconfig** directory of Multisim. The default path of the directory is: “//C:\Program Files (x86)\National Instruments\Circuit Design Suite 14.2\pldconfig//”.
 +
 +Open Multisim, start a new PLD design and select the FPGA board you created the configuration files for. After naming your project, you should be able to select the pins you want to use in your project.
 +</WRAP><WRAP half column>
 +{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:new_pld_arty-s7.png?400 |}}
 +</WRAP></WRAP>
 +----
 +
 +===== Next Steps =====
 +<WRAP group>
 +To program your FPGA board through Multisim, follow this guide: [[learn:programmable-logic:tutorials:program_fpgas_through_multisim:start|]].
 +
 +If you have any problems with this process, feel free to post your questions to the [[https://forum.digilent.com/forum/4-fpga/|Digilent Forum]].
 +</WRAP>