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learn:courses:digital-projects:blinking-leds:start [2023/10/19 17:11] – created Marthalearn:courses:digital-projects:blinking-leds:start [2023/11/07 00:07] (current) – Arthur Brown
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-====== Use Flip-Flops to Build a Clock Divider ====== +====== Project 8: Blinking LEDs and a Clock Divider ======
-===== Blinking LEDs ===== +
- +
 ===== Introduction ===== ===== Introduction =====
 A flip-flop is an edge-triggered memory circuit. In this project, we will implement a flip-flop behaviorally using Verilog®, and use a bunch of flip-flops to implement a clock divider that blinks the LEDs. A flip-flop is an edge-triggered memory circuit. In this project, we will implement a flip-flop behaviorally using Verilog®, and use a bunch of flip-flops to implement a clock divider that blinks the LEDs.
  
 Before you begin, you should: Before you begin, you should:
-  * Have the Xilinx® ISE WebPACK™ installed.+  * Have Vivado installed.
   * Have your FPGA board set up.   * Have your FPGA board set up.
   * Be able to describe a digital circuit using logic operators.   * Be able to describe a digital circuit using logic operators.
-  * Be able to write test bench and simulate circuit using ISim.+  * Be able to write test bench and simulate circuit using Vivado's simulator.
   * Be able to model and simulate circuit delay.   * Be able to model and simulate circuit delay.
  
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 ===== Inventory===== ===== Inventory=====
-  * 1 Digilent Nexys 4, Nexys 3, Nexys 2, or Basys 2 FPGA Board +  * Digilent Nexys A7 or Basys 3 FPGA Board 
-  * Xilinx ISE Design Suite: WebPACK (14.6 Recommended) +  * Vivado Installation
-  * Digilent Adept+
  
  
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 ===== Step 1: Implement D-FF ===== ===== Step 1: Implement D-FF =====
-In this step, we are going to implement a D-FF with asynchronous reset.+In this step, we are going to implement a D-FF with asynchronous reset.\\ \\
 1. As the block diagram in Fig. 1 shows, D flip-flops have three inputs: data input (D), clock input (//clk//), and asynchronous reset input (//rst//, active high), and one output: //data output// (Q). 1. As the block diagram in Fig. 1 shows, D flip-flops have three inputs: data input (D), clock input (//clk//), and asynchronous reset input (//rst//, active high), and one output: //data output// (Q).
  
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 {{ :learn:courses:digital-projects:blinking-leds:dividersim.png?nolink |Figure 5. Clock divider simulation waveform. {{ :learn:courses:digital-projects:blinking-leds:dividersim.png?nolink |Figure 5. Clock divider simulation waveform.
-Screenshot above is from Xilinx ISim running on Microsoft Windows 7. Altered to enhance visual understanding.}}+}}
 <html> <html>
-<i><p style="text-align:center;">Figure 5. Clock divider simulation waveform.Screenshot above is from Xilinx ISim running on Microsoft Windows 7. Altered to enhance visual understanding.</p></i>+<i><p style="text-align:center;">Figure 5. Clock divider simulation waveform.</p></i>
 </html> </html>
-Now you can create a UCF file that maps clk to the global clock on board, rst to a push button, and led to an on-board LED. If your board has a 100 MHz clock, you can see that the LED blinks once every 1.45 seconds.+Now you can create an XDC file that maps //clk// to the global clock on board, //rst// to a push button, and //led// to an on-board LED. If your board has a 100 MHz clock, you can see that the LED blinks once every 1.45 seconds.
  
 ---- ----
  
 ===== Test Your Knowledge! ===== ===== Test Your Knowledge! =====
-Now that you've completed this project, try these modifications:+Now that you've completed this project, try these modifications:\\ \\
 1. Can you add two switches to control how fast the LED blinks: Say, if switch[1:0] is 0, LED blink frequency is 0.745 Hz; if switch[1:0] is 1, LED blink frequency is 1.49 Hz; if switch[1:0] is 2, LED blink frequency is 2.98 Hz; if switch[1:0] is 3, LED blink frequency is 5.96 Hz. 1. Can you add two switches to control how fast the LED blinks: Say, if switch[1:0] is 0, LED blink frequency is 0.745 Hz; if switch[1:0] is 1, LED blink frequency is 1.49 Hz; if switch[1:0] is 2, LED blink frequency is 2.98 Hz; if switch[1:0] is 3, LED blink frequency is 5.96 Hz.