For years, hardware engineers with interchangeable I/O needs had two strong choices – our own Pmod, which was developed as an open standard back in 2004, as well as the …
One lucky user was tasked to see what the Genesys ZU was capable of.
Pablo at ControlPaths.com has written a guide for creating a custom AXI IP using the Genesys ZU, but any Zynq MPSoC will do. We’re partial to the Genesys ZU though. …
Designed and manufactured by our partner, Trenz Electronic, the TE0802 is a development board integrating a Xilinx Zynq UltraScale+. The board features a variety of connectivity interfaces including DisplayPort, VGA, …
Our friend Yahya, Editor at Atadiat (the Arabic word for hardware), has put together a fine tutorial on serial engine programming. Using the MPSSE (Multi-Protocol Synchronous Serial Engine) from FTDI Chip …
The Arty S7, our FPGA development board using the cost efficient Xilinx Spartan 7, gives users plenty of I/O and expansion options to work with. Since its inception in 2018, …
Vitis is Xilinx’s unified software platform, replete with open source libraries optimized for Xilinx’s own hardware platforms and pre-built applications. The Genesys ZU is our “kitchen sink” development board boasting …
Pablo from controlpaths.com lent his expertise in Fast Fourier Transform (FFT) and applied it to our Eclypse Z7 board (using the SYZYGY Zmod ADC and DAC, and Xilinx’s xFFT IP). …
Engineers across the globe have been forced out of their labs and into their living rooms, asked to continue working on whatever projects they were prior to being self-quarantined. The …
We are really excited about some new products we released earlier this year: the Eclypse Z7, Zmod ADC 1410, and Zmod DAC 1410. Since we didn’t get a chance to …
For any of your larger sized files, you can be certain that most providers will keep files in the cloud to save storage space. That way, you’ll have access to …
If you’re stuck in the unfamiliar situation of attempting to complete the rest of this semester’s EE courses online (rather than in your lab), read on. We want to make …
Mixed‑signal validation often starts with more tools than necessary. An oscilloscope for analog signals, a logic analyzer for digital buses, and a separate signal generator just to get known inputs …
This Mandelbrot set renderer was created by Conrad, who shared the project on GitHub (username conradSZY05). Built for the Digilent Basys 3, the design uses VHDL and Xilinx Vivado to …
Debugging modern embedded systems often requires piecing together information from multiple tools to understand both analog and digital behavior. In a recent Digilent webinar, we took a closer look at …
The Question A Digilent forum user working on a vintage computing project needed to troubleshoot hardware built around a 6502 CPU. Their goal was to extract the CPU’s address and …
