An Examination of Oscilloscope Noise Due to Ground Issues
A discussion of how ground potential differences can (and will) effect oscilloscope measurements.
Month: October 2019
The Vitis Unified Software Platform: What We Learned at XDF
What do cancer research, finance, genome sequencing, driverless cars, and outer space have in common? Aside from all being fascinating applications, each of them are progressing through the use of …
Expansion Modules / Featured / FPGA Boards / From Our President / News & Announcements / Research and Rapid Prototyping
Embracing a New Standard
“A promising new FPGA connectivity solution is here.” Steve Johnson, President, Digilent, Inc. For engineers working with FPGAs (Field Programmable Gate Arrays) for high-speed control, signal processing, or test and measurement applications, a …
White Paper: Creating an Image Processing System
Our Zybo Z7 is one of the more popular FPGA Developer Boards in our arsenal, and rightfully so – it boasts a variety of peripherals surrounding the Zynq 7000 SoC …
Getting Your Lab Up and Running with Vivado
When your fresh-faced recruits are green and bright-eyed in the early days of the academic year, the last thing you’ll want to do is spend extensive amounts of time connecting, …
Test and Measurement Solutions for Students in the Lab and at Home
Innovations in flipped classrooms, online courses, and at-home labs have added the ability to serve more students without increasing the lab space, but how do you make sure students are …
Be the first
to know.
Sign up for Digilent's monthly newsletter for product updates and more!
Recent Articles
Introducing the Analog Discovery Pro ADP5250: The Biggest, Baddest, and Boldest Analog Discovery Yet
A Mixed-Signal Oscilloscope, Function Generator, Power Supply, and Digital Multimeter in One Package Earlier this year, we debuted the popular Analog Discovery Pro 3000 Series as a professional upgrade of …
You may have heard about VAXEL ZERO, the FPGA configuration/operation automation solution that runs on Windows PCs. VAXEL ZERO was developed by a group of seasoned RTL design verification engineers …
Constraining Ports in Block Designs In Vivado block designs, there are a couple of different ways to manage the inputs and outputs of your design and which FPGA pin locations they are connected to. …
A Reaction to a Recent Pandemic or An Established Solution to a Long-Standing Issue? If you’re anything like us here at Digilent, a part of you misses being in the …