Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Last revisionBoth sides next revision
test-and-measurement:digital-discovery:demos:zynq-qspi-boot [2022/03/28 20:47] – Update xilinx links Arthur Browntest-and-measurement:digital-discovery:demos:zynq-qspi-boot [2022/03/29 20:22] – fix flash datasheet link Arthur Brown
Line 10: Line 10:
   * Digital Discovery   * Digital Discovery
   * Zynq board with flash   * Zynq board with flash
 +    * **Note:** //This document was written using a Zybo Z7 of a revision earlier than D.0.//
   * SOIC clip if available   * SOIC clip if available
   * Wires   * Wires
Line 105: Line 106:
 Notice the short pause near the left end of the acquisition, that is where the clock frequency changes from 5.4 MHz to 25 MHz. Notice the short pause near the left end of the acquisition, that is where the clock frequency changes from 5.4 MHz to 25 MHz.
 ====== Step 4: Boot transfers ====== ====== Step 4: Boot transfers ======
-There are two documents that need to be read in order to understand what the data transfers represent. One is the [[https://docs.xilinx.com/v/u/en-US/ug585-Zynq-7000-TRM|Zynq TRM]] and the other one is the [[https://www.google.ro/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=0ahUKEwjTgJvg7uDVAhVI6xQKHfqpA74QFggmMAA&url=http%3A%2F%2Fwww.cypress.com%2Ffile%2F177966%2Fdownload&usg=AFQjCNGhj1bFGD6gfZGYWPR6pdwql2Oc3w|flash memory's datasheet]]. +There are two documents that need to be read in order to understand what the data transfers represent. One is the [[https://docs.xilinx.com/v/u/en-US/ug585-Zynq-7000-TRM|Zynq TRM]] and the other one is the [[https://www.infineon.com/dgdl/Infineon-S25FL128S_S25FL256S_128_Mb_(16_MB)_256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v18_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17|flash memory's datasheet]]. 
  
 The instructions sent from the Zynq to the flash memory are always sent via SPI using D0. The first instruction sent is 0x03 0x00 0x00 0x20 which means SPI READ from address 0x20 and the reply is also received via SPI using D1, 0x66 0x55 0x99 0xaa. The flash read instruction is explained on page 85 of the datasheet. The instructions sent from the Zynq to the flash memory are always sent via SPI using D0. The first instruction sent is 0x03 0x00 0x00 0x20 which means SPI READ from address 0x20 and the reply is also received via SPI using D1, 0x66 0x55 0x99 0xaa. The flash read instruction is explained on page 85 of the datasheet.