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reference:instrumentation:zmoddac:reference-manual [2019/10/25 11:29] – [2.4. AWG Out] Mircea Dabacanreference:instrumentation:zmoddac:reference-manual [2019/11/04 07:36] – [2.4. AWG Out] Mircea Dabacan
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   * Channel type: single ended   * Channel type: single ended
   * Resolution: 14-bit   * Resolution: 14-bit
-  * Absolute Resolution (amplitude ≤1.25V): 152μV +  * Absolute Resolution (amplitude ≤1.25V): 167μV 
-  * Absolute Resolution (amplitude >1.25V): 610μV+  * Absolute Resolution (amplitude >1.25V): 665μV
   * Accuracy - typical (|Vout| ≤ 1.25V): ±10mV ± 0.5% FIXME   * Accuracy - typical (|Vout| ≤ 1.25V): ±10mV ± 0.5% FIXME
   * Accuracy - typical (|Vout| > 1.25V): ±25mV ± 0.5% FIXME   * Accuracy - typical (|Vout| > 1.25V): ±25mV ± 0.5% FIXME
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 For high-gain: For high-gain:
  
-$$I_{outAWGFS\_HG}=32 \cdot \frac{1V}{8k \Omega}=4mA\label{3}\tag{3}$$+$$I_{outAWGFS\_HG}=32 \cdot \frac{1V}{8.06k \Omega}=3.97mA\label{3}\tag{3}$$
  
 For low-gain: For low-gain:
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-The Voltage range extends between:+The IC5B output voltage range extends between:
  
 $$ - V_{OUT\;IC5B\;FS} \le V_{OUT\;IC5B} <  - V_{OUT\;IC5B\;FS}\label{7}\tag{7}$$ $$ - V_{OUT\;IC5B\;FS} \le V_{OUT\;IC5B} <  - V_{OUT\;IC5B\;FS}\label{7}\tag{7}$$
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 Where (for high gain, respectively, low gain): Where (for high gain, respectively, low gain):
  
-$$V_{OUT\;IC5B\;FS\;HG}=I_{outAWG\;FS\;HG} \cdot R_{44}=996mV$$+$$V_{OUT\;IC5B\;FS\;HG}=I_{outAWG\;FS\;HG} \cdot R_{44}=989mV$$
 $$V_{OUT\;IC5B\;FS\;LG}=I_{outAWG\;FS\;LG} \cdot R_{44}=249mV\label{8}\tag{8}$$ $$V_{OUT\;IC5B\;FS\;LG}=I_{outAWG\;FS\;LG} \cdot R_{44}=249mV\label{8}\tag{8}$$
  
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 $$V_{AWG\;REL}=V_{OUT\;IC5B} \cdot (1+\frac{R_{41}}{R_{42}})=5.51 \cdot V_{OUT\;IC5B}\label{9}\tag{9}$$ $$V_{AWG\;REL}=V_{OUT\;IC5B} \cdot (1+\frac{R_{41}}{R_{42}})=5.51 \cdot V_{OUT\;IC5B}\label{9}\tag{9}$$
  
-The output voltage range depends on High- versus Lowe-range:+The output voltage range depends on High-gain versus Low-gain selection:
  
-$$ - 5.49V <  - 5V < V_{AWG\;REL\;HG} < 5V < 5.49V$$+$$ - 5.49V <  - 5V < V_{AWG\;REL\;HG} < 5V < 5.45V$$
 $$ - 1.37V < 1.25V < V_{AWG\;REL\;LG} < 1.25V < 1.37V\label{10}\tag{10}$$ $$ - 1.37V < 1.25V < V_{AWG\;REL\;LG} < 1.25V < 1.37V\label{10}\tag{10}$$
  
  
-Low-gain is used to generate low amplitude signals with improved accuracy. Any amplitude of the output signal is derivable by combining LowGain/HighGain setting (rough) with the digital signal amplitude (fine).+Low-gain is used to generate low amplitude signals with improved accuracy. Any amplitude of the output signal can be generated by combining LowGain/HighGain setting (rough) with the digital signal amplitude (fine).
  
 With the 14-bit DAC, the absolute resolution of the AWG AC component is: With the 14-bit DAC, the absolute resolution of the AWG AC component is:
  
 $$at\;Low\;Gain:\;\;\;\frac{{2.74V}}{{{2^{14}}}} = 167\mu V$$ $$at\;Low\;Gain:\;\;\;\frac{{2.74V}}{{{2^{14}}}} = 167\mu V$$
-$$at\;High\;Gain:\;\;\;\;\;\frac{{10.98V}}{{{2^{14}}}} = 670\mu V\label{11}\tag{11}$$+$$at\;High\;Gain:\;\;\;\;\;\frac{{10.9V}}{{{2^{14}}}} = 665\mu V\label{11}\tag{11}$$
  
-AD8021 is supplied with $\pm 8V$; to avoid saturation the user should keep the voltage in \ref{10} to:+AD8021 is supplied with +8.5V/-8V (the VCC8V0 voltage is in fact 8.5V). Conform to the data sheet, the worst case output voltage swing is V<sub>-</sub>+1.8V to V<sub>+</sub>-2.2V.
  
-$$ - 6.5V < 5V < V_{AWG\;REL} < 5V < 6.2V\label{12}\tag{12}$$+The nominal resistance of the PTC in the feedback loop is 33 ohm. The maximum current delivered by te AWG is 30mA. 
 + 
 +To avoid saturation, the voltage in \ref{9} should stay in: 
 + 
 +$$ -8V + 1.8V + 33\Omega *30mA = -5.21V < -5V < V_{AWG\;REL} < 5V < 8.5-2.2V-33\Omega*30mA = 5.31V\label{12}\tag{12}$$
  
 Only inner (tighter) ranges are used in equations \ref{10} and \ref{12}, for providing tolerance margins. Only inner (tighter) ranges are used in equations \ref{10} and \ref{12}, for providing tolerance margins.
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     * 4 * 1.33  = 5.32 (for HG: +/-5V)     * 4 * 1.33  = 5.32 (for HG: +/-5V)
  
-The R146 PTC thermistor provides thermal protection in case of an output shortcut.+The R146 PTC thermistor provides thermal protection in case of an output short-circuit.
  
 The IC7 relay (non-latching) is OPEN at the power-on, decoupling the power-on glitch of the OpAmp from the load. It is CLOSED by the FPGA, via Q1.   The IC7 relay (non-latching) is OPEN at the power-on, decoupling the power-on glitch of the OpAmp from the load. It is CLOSED by the FPGA, via Q1.  
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 D2 is an ESD suppressor.  D2 is an ESD suppressor. 
  
-R36 is the 50 output impedance. +R36 is the 50Ω AWG output impedance. 
 ---- ----
 ==== 2.3. AWG output stage protection ==== ==== 2.3. AWG output stage protection ====
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 The protection circuit in [[reference:instrumentation:zmoddac:reference-manual#figure_6|Fig. 6]] limit the Output stage supply currents, with fold-back: The protection circuit in [[reference:instrumentation:zmoddac:reference-manual#figure_6|Fig. 6]] limit the Output stage supply currents, with fold-back:
  
-$$\frac {AVCC8V0 \cdot R_{77}}{R_{72}+R_{77}} = \frac{(AVCC8V0 + R_{70} \cdot I_{out}) \cdot R_{74}+$$\frac {AVCC8V0 \cdot R_{77}}{R_{72}+R_{77}} = \frac{(AVCC8V0 - R_{70} \cdot I_{out}) \cdot R_{74}+
 AVCC8V0AWG1 \cdot R_{73}}{R_{73}+R_{74}}$$ AVCC8V0AWG1 \cdot R_{73}}{R_{73}+R_{74}}$$
  
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 To trace the  analog bandwidth of the DAC and output stage beyond the theoretical limit of f<sub>SAMPLE</sub>/2= 50MHz, the following experiment was performed: To trace the  analog bandwidth of the DAC and output stage beyond the theoretical limit of f<sub>SAMPLE</sub>/2= 50MHz, the following experiment was performed:
-  * The AWG was set to generate a 20MGz rectangular signal, 100mV amplitude;+  * The AWG was set to generate a 2MHz rectangular signal, 100mV amplitude;
   * the theoretical amplitudes of the fundamental and first 69 harmonics was computed;   * the theoretical amplitudes of the fundamental and first 69 harmonics was computed;
-  * the actual amplitudes of the fundamental and first 69 harmonics was measured with a high sapling rate scope (10GSPS, 2GHz BW);+  * the actual amplitudes of the fundamental and first 69 harmonics were measured with a high sampling rate scope (10GSPS, 2GHz BW);
   * the dB difference between the theoretical and measured amplitudes was plotted. This represents an approximation of the frequency characteristic of the DAC and output stage.   * the dB difference between the theoretical and measured amplitudes was plotted. This represents an approximation of the frequency characteristic of the DAC and output stage.
  
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 The 3dB bandwidth is close to the theoretical Nyquist limit for a 100MHz sampling system. This has the advantage of very sharp edges (see the rectangular signal in [[reference:instrumentation:zmoddac:reference-manual#figure_9|Fig. 9]]), but also generates alias effects. The ZmodADC generated signals were recorded with a high BW scope in [[reference:instrumentation:zmoddac:reference-manual#figure_9|Fig. 9]], and  The 3dB bandwidth is close to the theoretical Nyquist limit for a 100MHz sampling system. This has the advantage of very sharp edges (see the rectangular signal in [[reference:instrumentation:zmoddac:reference-manual#figure_9|Fig. 9]]), but also generates alias effects. The ZmodADC generated signals were recorded with a high BW scope in [[reference:instrumentation:zmoddac:reference-manual#figure_9|Fig. 9]], and 
- the right side of [[reference:instrumentation:zmoddac:reference-manual#figure_10|Fig. 10]] and [[reference:instrumentation:zmoddac:reference-manual#figure_11|Fig. 11]]. In [[reference:instrumentation:zmoddac:reference-manual#figure_11|Fig. 11]], the sinus frequency is 10MHz, and the 100MHz samples are clearly visible. In the left side of [[reference:instrumentation:zmoddac:reference-manual#figure_10|Fig. 10]] and [[reference:instrumentation:zmoddac:reference-manual#figure_11|Fig. 11]], the same scope was used, but with 20MHz BW limitation. The rectangular signal edges are slower and the sinus samples are not visible.+ the right side of [[reference:instrumentation:zmoddac:reference-manual#figure_10|Fig. 10]] and [[reference:instrumentation:zmoddac:reference-manual#figure_11|Fig. 11]]. In [[reference:instrumentation:zmoddac:reference-manual#figure_11|Fig. 11]], the sinus frequency is 10MHz, and the 100MHz samples are clearly visible. In the left side of [[reference:instrumentation:zmoddac:reference-manual#figure_10|Fig. 10]] and [[reference:instrumentation:zmoddac:reference-manual#figure_11|Fig. 11]], the same scope was used, but with 20MHz BW limitation. The rectangular signal edges are slower and the sine wave samples are not visible.
  
 The typical Slew Rate of the AWG can be read in [[reference:instrumentation:zmoddac:reference-manual#figure_9|Fig. 9]]: The typical Slew Rate of the AWG can be read in [[reference:instrumentation:zmoddac:reference-manual#figure_9|Fig. 9]]:
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 ==== 4.3. AVCC8V0 ==== ==== 4.3. AVCC8V0 ====
  
-The user power supplies [[reference:instrumentation:zmoddac:reference-manual#figure_15|Fig. 15]] use [[https://www.analog.com/en/products/adp1612.html|ADP1612]] Switching Converter in Buck-Boost DC-to-DC topology. Main features:+The user power supplies [[reference:instrumentation:zmoddac:reference-manual#figure_15|Fig. 15]] use [[https://www.analog.com/en/products/adp1612.html|ADP1612]] Switching Converter in SEPIC DC-to-DC topology. Main features:
  
   * 1.4A current limit   * 1.4A current limit
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 ==== 4.4. AVCC-8V0 ==== ==== 4.4. AVCC-8V0 ====
  
-The user power supplies [[reference:instrumentation:zmoddac:reference-manual#figure_15|Fig. 15]] use [[https://www.analog.com/en/products/adp1612.html|ADP1612]] Switching Converter in Buck-Boost DC-to-DC topology. +The user power supplies [[reference:instrumentation:zmoddac:reference-manual#figure_16|Fig. 16]] use [[https://www.analog.com/en/products/adp1612.html|ADP1612]] Switching Converter in CUK DC-to-DC topology. 
  
 IC13 introduces the required inversion for the negative supply. [[https://www.analog.com/en/products/ada4841-1.html|ADA4841]] features: IC13 introduces the required inversion for the negative supply. [[https://www.analog.com/en/products/ada4841-1.html|ADA4841]] features: