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| learn:courses:real-analog-chapter-5:start [2016/12/28 21:35] – Martha | learn:courses:real-analog-chapter-5:start [2023/02/10 12:34] (current) – external edit 127.0.0.1 | ||
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| - | ====== Real Analog: Chapter 5 ====== | + | ===== Real Analog: Chapter 5 ====== |
| - | ====== 5. Introduction and Chapter Objectives | + | [[{}/ |
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| + | * Chapter 5 Video: | ||
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| + | ===== 5. Introduction and Chapter Objectives ===== | ||
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| The above constraint is based on pure inequalities – in general, the output voltage range will be somewhat less than the range specified by V- and V+. The margin between the output and the supply voltages will vary depending on the specific op-amp. Any attempt to drive the output voltage beyond the range specified by the supply voltages will cause the output to // | The above constraint is based on pure inequalities – in general, the output voltage range will be somewhat less than the range specified by V- and V+. The margin between the output and the supply voltages will vary depending on the specific op-amp. Any attempt to drive the output voltage beyond the range specified by the supply voltages will cause the output to // | ||
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| - | Similarly it makes sense that the power supply voltages will constrain the range of allowable input voltages, as provided below: | ||
| **Input Voltage Constraint**: | **Input Voltage Constraint**: | ||
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| * The voltages at the input terminals are the same: $v_n = v_p$ | * The voltages at the input terminals are the same: $v_n = v_p$ | ||
| * The output voltage is constrained to be between the positive and negative power supply voltages: $V^- < v_{OUT} < V^+$ | * The output voltage is constrained to be between the positive and negative power supply voltages: $V^- < v_{OUT} < V^+$ | ||
| - | * The input voltages are constrained to be between | + | * Nothing is known about the current out of the op-amp, $i_{OUT}$ |
| * All voltages on the above diagram are relative to the same reference. | * All voltages on the above diagram are relative to the same reference. | ||
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| $$V_{OUT} = K \left(v_p - v_n \right) = K \cdot \Delta v_{in} | $$V_{OUT} = K \left(v_p - v_n \right) = K \cdot \Delta v_{in} | ||
| - | Where in $\Delta v_{in}$ is the difference between the voltages at the input terminals and //K// is a very large number. (Values of //K// for typical commercially available operational amplifiers can be on the order of $10^6$$ or higher.) Since the output voltage is constrained to be less than the supply voltages, | + | Where in $\Delta v_{in}$ is the difference between the voltages at the input terminals and //K// is a very large number. (Values of //K// for typical commercially available operational amplifiers can be on the order of $10^6$ or higher.) Since the output voltage is constrained to be less than the supply voltages, |
| $$V^- < K \cdot \Delta v_{in} < V^+$$ | $$V^- < K \cdot \Delta v_{in} < V^+$$ | ||
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| ==== Exercises ==== | ==== Exercises ==== | ||
| - | - An operational amplifier has a gain K = 10,000. The voltage supplies are $V+ = 20V$ and $V-= -10V$. Determine the output voltage if the voltage difference between the input terminals $\left( v_p - v_n \right) is: | + | - An operational amplifier has a gain K = 10,000. The voltage supplies are $V+ = 20V$ and $V-= -10V$. Determine the output voltage if the voltage difference between the input terminals $\left( v_p - v_n \right)$ is: |
| - 1mV | - 1mV | ||
| - 2mV | - 2mV | ||
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| Applying KCL at the inverting terminal of the op-amp results in: | Applying KCL at the inverting terminal of the op-amp results in: | ||
| - | $$\frac{V_1-0}{R} + \frac{V_2 -0}{R} = \frac{0-V_{OUT}{R}$$ | + | $$\frac{V_1-0}{R} + \frac{V_2 -0}{R} = \frac{0-V_{OUT}}{R}$$ |
| Or | Or | ||
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| The op-amp output resistance essentially limits the amount of power the op-amp can provide at its output terminal. This can become a problem if we want to connect very low resistance loads to the output of an operational amplifier. For example, audio speakers commonly have an 8Ω resistance. Figure 5.18 shows an 8Ω speaker connected to the output of an operational amplifier which has an 80Ω output resistance. In this case, we expect the maximum output voltage to be: | The op-amp output resistance essentially limits the amount of power the op-amp can provide at its output terminal. This can become a problem if we want to connect very low resistance loads to the output of an operational amplifier. For example, audio speakers commonly have an 8Ω resistance. Figure 5.18 shows an 8Ω speaker connected to the output of an operational amplifier which has an 80Ω output resistance. In this case, we expect the maximum output voltage to be: | ||
| - | $$v_{out} = K \cdot V_S \right( \frac{8\Omega}{8\Omega + 80\Omega} \right) = 0.09KV_s$$ | + | $$v_{out} = K \cdot V_S \left( \frac{8\Omega}{8\Omega + 80\Omega} \right) = 0.09KV_s$$ |
| If the maximum output voltage of the op-amp is low, we may not have nearly enough power to operate the speaker. | If the maximum output voltage of the op-amp is low, we may not have nearly enough power to operate the speaker. | ||
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| * The effect of a non-zero output resistance on an operational amplifier’s operation is that the power output of the amplifier is limited. Thus, a realistic operational amplifier will not be able to provide any arbitrary current to a load. Whether this has a significant effect on the overall circuit’s operation is primarily dependent upon the value of the load resistance. | * The effect of a non-zero output resistance on an operational amplifier’s operation is that the power output of the amplifier is limited. Thus, a realistic operational amplifier will not be able to provide any arbitrary current to a load. Whether this has a significant effect on the overall circuit’s operation is primarily dependent upon the value of the load resistance. | ||
| * The effect of a finite op-amp gain is that the voltage difference across the input terminals may not be identically zero. | * The effect of a finite op-amp gain is that the voltage difference across the input terminals may not be identically zero. | ||
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