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learn:programmable-logic:tutorials:arty-microblaze-base-system-design:start [2016/07/08 20:02] – Sam K | learn:programmable-logic:tutorials:arty-microblaze-base-system-design:start [2017/02/18 01:06] – Andrew Holzer | ||
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===== Prerequisites ===== | ===== Prerequisites ===== | ||
- | |||
- | ===Skills=== | ||
- | * **Basic familiarity with Vivado** | ||
- | * //This experience can be found by walking through our " | ||
===Hardware=== | ===Hardware=== | ||
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===Software=== | ===Software=== | ||
- | * **Vivado Design Suite 2015.4** | + | * **Vivado Design Suite 2016.4** |
- | * //You must use this version or the project will not generate// | + | * //Newer versions can be used, but the procedure may vary slightly// |
- | * //Note: Older commit in repo corresponds to a 2015.3 release// | + | * **Xilinx SDK 2016.4** |
- | * **Xilinx SDK 2015.4** | + | |
- | + | ||
- | === Board Support Files === | + | |
* **Arty Support Files** | * **Arty Support Files** | ||
* These files will describe GPIO interfaces on your board and make it easier to select your FPGA board and add GPIO IP blocks. | * These files will describe GPIO interfaces on your board and make it easier to select your FPGA board and add GPIO IP blocks. | ||
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===== Downloads ===== | ===== Downloads ===== | ||
- | Arty Support Repository -- [[https:// | + | Arty Support Repository -- [[https:// |
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