Pmod IP Core Update – FPGA and Zynq Support

A year ago we introduced the Pmod IP cores, IP blocks for easy drag and drop use in MicroBlaze designs. With ready to use IP cores, adding Pmods to your FPGA or Zynq board can go from hours of additional work down to minutes, especially if you are following our Using Pmod IP’s tutorial.

Since the time of introduction, more Pmods have been added and the tutorial has been updated to handle unique cases like using interrupts. The below tables are now included to help you stay up to date on which Pmods and system boards are currently supported, as well as help you navigate through some of the implementation details.

Pmods Supported

Pmod Interface Type Reference clock frequency (MHz) Reference Clock signal name Interrupt pin name/s Uses PmodGPIO Other Notes
8LD GPIO Yes
ACL SPI 80 ext_spi_clk
ACL2 SPI 50 ext_spi_clk
AD1 SPI If an AXI clock faster than 100MHz is used, customization parameters need to be scaled appropriately.
AD2 IIC
ALS SPI 50 ext_spi_clk
AMP2 GPIO timer_interrupt
BB GPIO Yes
BTN GPIO Yes
DA1 SPI 50 ext_spi_clk
ENC GPIO
HYGRO IIC
JSTK SPI 16 ext_spi_clk
JSTK2 SPI 16 ext_spi_clk
KYPD GPIO
LED GPIO Yes
NAV SPI/GPIO 50 ext_spi_clk
OLED SPI/GPIO 50 ext_spi_clk
OLEDrgb SPI/GPIO 50 ext_spi_clk
R2R GPIO
RTCC IIC
SF3 SPI 50 ext_spi_clk QSPI_INTERRUPT
SWT GPIO Yes
TC1 SPI 50 ext_spi_clk
CLS SPI 50 ext_spi_clk

 

Platforms Supported

Platform Processor Type Memory Interface Generator (MIG) Used? Notes
Arty Microblaze Yes
Arty S7 Microblaze Yes
Arty Z7 Zynq No
Basys3 Microblaze No
Cmod A7 Microblaze No
Genesys2 Microblaze Yes
Nexys4 Microblaze No
Nexys4-DDR Microblaze Yes
Nexys Video Microblaze Yes
ZedBoard Zynq No
Zybo Zynq No
Zybo Z7 Zynq No

 

We are consistently adding new products to these lists and updating the tutorial to make it easier to follow and more useful. If you have suggestions on what we can improve, please let us know in the comments below or on the Digilent Forum!

Author

Be the 1st to vote.

Leave a Reply

Your email address will not be published. Required fields are marked *