Field-programmable gate arrays (FPGAs) are digital devices. They can’t read a voltage directly. To bring an analog signal into an FPGA, you need an ADC, short for analog-to-digital converter.
You have four ways to do it. Use an on-chip ADC block if the FPGA has one, such as the XADC on Xilinx 7-series and Zynq chips or the MAX 10’s built-in ADC, add an external ADC through a Pmod expansion, step up to a high-speed SYZYGY or Zmod module, or wire in a standalone ADC chip over SPI or a parallel bus.
Below is every practical route for getting analog signals into an FPGA board, from the on-chip converter you already have for free to a fully custom high-speed acquisition front end.
Why FPGAs Need External ADCs (Mostly)
If you’ve ever tried to feed a temperature sensor, a microphone, or an intermediate frequency (IF) signal into an FPGA and wondered why nothing worked, the reason is simple. FPGA fabric only understands ones and zeros.
The input pins use Schmitt-trigger buffers, not converters, so all a pin can tell you is high or low. It can’t measure the exact voltage sitting in between.
A temperature sensor output, an audio waveform, or an RF intermediate frequency all vary continuously. Before an FPGA can work with that signal, an ADC samples it at regular intervals and converts each measurement into a discrete digital value.
The Four Main Ways to Get Analog In
Each of the four routes below has its own sweet spot for cost, speed, and complexity, and the sample rate you need usually points you to the right one.
Option 1: Use an On-Chip ADC (XADC on Xilinx, MAX 10 on Intel)
Some FPGAs include a small ADC right on the die, so analog input comes essentially free. The two you’ll run into most are the Xilinx XADC (12-bit, 1 MSPS, on Artix-7 and Zynq-7000) and the Intel MAX 10 built-in ADC (12-bit, 1 MSPS on select devices).
If your FPGA already has one of these blocks, it’s easily the cheapest and fastest way to read slow analog signals. On many Digilent FPGA boards with XADC, the Basys 3, Nexys A7, and Arty A7 among them, the XADC is exposed through a dedicated JXADC Pmod header that routes analog signals straight into the internal converter. No external SPI bridge required.
What the XADC Can and Cannot Do
Here’s what you actually get. Two dedicated differential input channels (VP/VN), plus 16 auxiliary channels routed through the Pmod header, at 12-bit resolution and up to 1 MSPS.
Great for monitoring supply rails, reading temperature sensors, and capturing other low-frequency signals, the kind of housekeeping measurements where you don’t want to add extra hardware.
Not so great for audio (marginal at best), RF, or high-precision measurement. Once your signals climb above a few hundred kilohertz, or you need better than 12-bit accuracy, reach for a dedicated converter instead.
The JXADC Pmod Connector on Digilent Boards
Several Digilent FPGA boards expose the XADC through a clearly labeled Pmod header called JXADC. Plug anything into this connector and its analog pins route directly to the on-chip ADC, with no external SPI bridge and no interface HDL to write for the analog path itself.
That makes JXADC the quickest way to experiment with analog input on a board you already own. For the exact pinout and wiring details, Digilent’s JXADC Pmod connector guide covers which pins map to which analog channels.
Option 2: Add a Pmod ADC Module
Pmod is Digilent’s small-form-factor peripheral standard, and it’s usually the fastest way to add analog input to any board with a spare Pmod port. You get a ready-made module, ready to be plugged in. No PCB design, no soldering.
Several Pmod ADCs cover the range, including the Pmod AD1 (12-bit, 1 MSPS), Pmod AD2 (12-bit, 4-channel, I²C), and Pmod AD5 (16-bit, 200 kSPS), plus the Pmod DA2 and DA4 for analog output. The catch is bandwidth.
A Pmod ADC connects in seconds but tops out well below what a Zmod can do. Browse the Pmod modules to see the full range.
When to Choose a Pmod ADC
Reach for a Pmod ADC when your signals are slow to moderate, and you’d rather move quickly than perfect the analog front end. Typical uses include sensor reading (temperature, strain, pressure), audio up to around 48 kHz, and low-frequency instrumentation.
A Pmod ADC fits any Digilent FPGA board with a free Pmod port, which is exactly why it’s the go-to for coursework, lab experiments, and rapid prototyping. If your sample-rate needs stay under a few MSPS and you’d rather write firmware than lay out a board, this is your option.
How to Interface a Pmod ADC in Verilog / VHDL
Most Pmod ADCs talk over SPI. You write a small SPI master that ties MOSI, MISO, SCK, and CS to the Pmod pins, generates the serial clock, and shifts in the conversion result each cycle. Here’s a high-level Verilog sketch of the idea.
// High-level SPI master sketch, verify pinout and bit order
// against the Digilent reference for your specific Pmod.
module pmod_adc_spi (
input wire clk, // system clock
input wire rst,
output reg sck, // SPI clock to Pmod
output reg cs_n, // chip select (active low)
input wire miso, // data from ADC
output reg [11:0] sample, // 12-bit result
output reg sample_valid
);
// 1. Assert cs_n low to start a conversion/read frame
// 2. Toggle sck, sampling miso on the appropriate edge
// 3. Shift each incoming bit into a shift register
// 4. After 12 (or 16) bits, latch into 'sample'
// and pulse 'sample_valid'
// 5. Raise cs_n, wait the required inter-frame delay
endmoduleBefore you finalize your HDL, double-check the exact pinout, SPI mode, and bit order against the Digilent reference documentation for your specific Pmod. Different Pmod ADCs use different frame lengths and clock polarities, and that’s an easy detail to get burned by.
Option 3: Use a Zmod (SYZYGY) High-Speed ADC
When Pmod bandwidth runs out, Zmod is the next step up. Built on the SYZYGY standard, these modules support much higher sample rates through a larger, high-density connector.
Options include the Zmod Scope 1410, with two channels, 14-bit resolution, and sample rates up to 125 MS/s, and the Zmod Digitizer 1430-125 for high-speed data acquisition. The Zmod AWG 1411 handles signal generation. These modules need a Zmod-compatible carrier such as the Eclypse Z7.
If you’ve worked with FPGA mezzanine card (FMC) ADCs before, think of Zmod as Digilent’s answer to the same problem, built around the SYZYGY standard instead.
Explore the full lineup of Zmod expansion modules to match your speed and resolution targets.
When to Choose a Zmod
Choose a Zmod anywhere Pmod’s bandwidth falls short. That could mean RF acquisition, software-defined radio (SDR), oscilloscope-like instrumentation, high-frequency DSP, or ultrasound.
If you’re sampling megahertz-range signals, or building a measurement instrument that needs faithful, high-speed capture, a Zmod hands you that performance in a plug-in form, without you having to design a high-speed analog front end from scratch.
Eclypse Z7 + Zmod: A Complete Data-Acquisition Path
The Eclypse Z7 pairs two SYZYGY connectors with a Zynq-7000 processing system, dual ARM cores plus FPGA fabric on one device. A Zmod digitizer feeds samples into the FPGA fabric, which can stream them via DMA to DDR for buffering and analysis, all managed by the onboard Zynq processing system.
The same board can also drive a Zmod DAC, so you end up with a full input-to-output signal chain on one carrier. Good fit for closed-loop control, hardware-in-the-loop (HIL) simulation, and DSP prototyping, anywhere you need to acquire, process, and regenerate signals in real time.
Option 4: Wire an External ADC via SPI or Parallel Bus
When you can’t, or don’t want to, use a Digilent-standard connector, you bring your own ADC chip. Put the converter on a custom PCB or breadboard and wire its digital output lines to FPGA GPIO.
This route gives you the most flexibility, with the freedom to choose the ADC, resolution, and sample rate that fit your design. The trade-off is that you write and time-close all of the interface HDL yourself, plus take on the analog PCB layout.
It’s the most work, but it’s also the only path when your requirements fall outside what off-the-shelf modules offer. Think unusual bit depths, exotic sample rates, or a production design with tight cost targets.
SPI ADCs: The Easiest External Option
SPI ADCs are the gentlest entry point into custom analog input. Parts like the AD7980 (16-bit, 1 MSPS) or the MCP3008 (10-bit, 200 kSPS) speak plain SPI.
Wire MOSI, MISO, SCK, and CS to any four FPGA pins, write an SPI master (much like the Pmod sketch above), and read the conversion results. SPI uses only a handful of signals and runs at modest clock rates, so you sidestep the trace-matching and clocking headaches that come with parallel interfaces. Solid choice when you need a specific converter but don’t need extreme speed.
Parallel-Bus ADCs: For Higher Speed
High-speed ADCs, 100+ MSPS, typically output data over a parallel LVDS bus. Reading them means SERDES-capable FPGA I/O, careful trace-length matching, and often a dedicated clocking scheme to manage skew and jitter.
That’s demanding, board-level engineering, and it’s exactly why Zmod exists. Digilent has already done the hard PCB and timing work, so you can get high-speed acquisition without solving the parallel-interface problem from scratch yourself.
How to Choose: A Decision Framework
The right method comes down to your sample rate, your resolution, and how much design work you actually want to take on. On-chip works best when your FPGA supports it, and your signals are slow. Pmod ADCs get you running fastest.
Zmod modules hand you 100+ MSPS in a plug-in form factor. Full custom ADCs give ultimate control, at the highest complexity.
Sample rate narrows the field quickest, so work through the criteria in that order, then check the summary table to confirm your pick.
By Sample Rate
Sample rate is usually the quickest way to narrow down your options.
- Under 1 MSPS: The on-chip XADC or a Pmod ADC handles slow sensors and rail monitoring comfortably.
- 1-10 MSPS: Step up to a Pmod AD1 or an external SPI ADC.
- Above 10 MSPS: You need a Zmod or an external LVDS ADC.
By Resolution
Twelve-bit resolution is the standard baseline, and it’s what the XADC and most Pmod ADCs deliver. Need 14 to 16 bits? You’ll want a dedicated ADC IC such as the Pmod AD5 or an external converter.
For precision instrumentation at 20+ bits, you’re in dedicated-converter territory, usually a sigma-delta part chosen for accuracy over speed.
By Channel Count
The XADC gives you 2 dedicated inputs plus 16 auxiliary channels. Multi-channel Pmods like the AD2 pack 4 inputs into one module, and a Zmod adds 2 high-speed channels per module.
For dozens of inputs, chain external ADCs or use multiplexed serial converters to fan out across many signals.
By Cost
Cost may rise quickly once you move beyond the hardware already on the FPGA.
- On-chip ADC: Effectively free. No additional hardware is required.
- Pmod ADC: Roughly $30-90.
- Zmod: Around $200-500.
- External IC on a custom PCB: Variable, and you also pay in engineering time.
Decision Framework: Four Ways to Add Analog Inputs to an FPGA
Here’s how the four options compare at a glance.
| Method | Sample rate | Best for | Complexity |
|---|---|---|---|
| On-chip ADC (XADC / SYSMON) | Up to ~1 MSPS | Rail monitoring, slow sensors, low channel count | Very low |
| Pmod ADC modules | 10 kSPS – 4 MSPS | General sensor input, quick projects, coursework | Low |
| Zmod / SYZYGY modules | 100 MSPS – 125 MSPS | SDR, RF acquisition, DSP, instrumentation | Medium |
| External ADCs (SPI / parallel) | 1 MSPS – 1 GSPS+ | Custom instrumentation, unusual bit depths, production designs | High |
Common Design Pitfalls
Picking the right converter is only half the job. There are three things to watch when adding analog input to an FPGA.
Analog Input Filtering
Every ADC needs an anti-aliasing filter, a low-pass filter set below the Nyquist frequency (half your sample rate). Skip it, and any signal energy above Nyquist folds back into your passband as aliased spurs you can never remove in software afterward.
Beyond the filter, watch your input impedance matching so the source doesn’t sag under the ADC’s sampling load. High-speed converters usually need a dedicated driver op-amp to charge the sampling capacitor cleanly.
For a related look at filtering acquired signals, Digilent also covers reducing noise in analog signals in its test and measurement tools.
Sampling Clock Stability
High-resolution ADCs are brutally sensitive to clock jitter, where timing uncertainty on the sampling edge translates straight into amplitude error. Above 10 MSPS at 14+ bits, drive the ADC from a dedicated, low-jitter clock source rather than a re-timed clock derived inside the FPGA.
FPGA-generated clocks just carry too much jitter for precise high-speed sampling.
Ground and Reference Noise
Keep analog and digital grounds separate and join them at a single point. Otherwise, digital switching currents creep into your analog readings. Your reference voltage matters just as much, and it needs to be quieter than 1 LSB, because any noise riding on the reference shows up directly in every conversion result.
A Quick Example: Reading a Pmod AD1 on an Arty A7
A Pmod AD1 on an Arty A7 is a simple example of how this works in practice. The basic setup looks like this:
- Plug the Pmod AD1 into a Pmod connector on the Arty A7 (JA works fine).
- In Vivado, create a new project and target the Arty A7 device.
- Add the Arty A7 board files and constrain the JA Pmod pins in the .xdc file.
- Write a small SPI master module in Verilog to clock in the 12-bit conversion result.
- Route the result to a UART transmitter and stream it to a PC terminal.
- Check against the Pmod AD1 reference to confirm the exact SPI bit order and timing.
The same basic process applies to most Pmod ADC projects, although the interface details will vary between modules.
Frequently Asked Questions
Can an FPGA directly read an analog voltage?
Generally, no. FPGA I/O pins are digital, reading any voltage below roughly 0.8 V as logic 0 and above about 2 V as logic 1, with nothing measured in between. To capture an actual voltage level, you need an ADC, either on-chip (XADC or MAX 10) or external.
What is the XADC on a Digilent FPGA board?
It’s Xilinx’s answer to “why buy an ADC if you don’t have to,” a 12-bit, 1 MSPS converter baked right onto Artix-7 and Zynq-7000 silicon. You get two dedicated differential inputs and 16 auxiliary channels, reachable on Digilent boards through the JXADC Pmod header without touching an external converter at all.
What is the difference between a Pmod ADC and a Zmod ADC?
The biggest differences are speed, interface, and connector size. Pmod ADCs are aimed at lower-speed acquisition and plug into the compact Pmod header. Zmod modules use the higher-bandwidth SYZYGY interface and are built for applications such as high-speed data acquisition and instrumentation.
A Pmod ADC is what you grab for a sensor project. A Zmod is what you reach for once you’re building an actual instrument.
Can I make an ADC using only FPGA logic, no ADC chip?
Yes, up to a point. A first-order sigma-delta ADC can be built with FPGA logic plus a couple of external passives (a comparator and an RC filter). Resolution and speed are limited, so this really only makes sense in tightly cost-constrained designs.
How many analog inputs can I add to one FPGA board?
You’re limited by pin count and available Pmod / Zmod headers. On a Basys 3, a 4-channel Pmod AD2 puts four inputs on one Pmod slot. An Eclypse Z7 takes it further, with two Zmod ports providing four high-speed channels. For dozens of inputs, use multiplexed or serial ADCs.
What sample rate do I need for audio input on an FPGA?
For standard audio, 44.1 kHz or 48 kHz covers most applications, and both rates sit comfortably within the Pmod AD1’s capabilities. If you need 24-bit audio instead, a dedicated audio module such as the Pmod I2S2 is a better fit. It supports sample rates up to 108 kHz on input and 200 kHz on output.
Which Digilent FPGA board is best for high-speed analog input?
The Eclypse Z7 is built for this kind of high-speed acquisition. Its two SYZYGY connectors support Zmod modules such as the 14-bit Zmod Scope 1410, with variants reaching 125 MS/s. The Zynq-7000 processing system can then handle data streaming via DMA to DDR for buffering and processing.
Do I need Vivado to program the analog input logic?
For Xilinx / AMD FPGAs, which cover nearly all Digilent boards, yes. Vivado handles synthesis, place-and-route, timing analysis, and bitstream generation. Digilent also provides board files and IP for XADC and Zmod integration to speed you along.
