Formerly known as the Zmod DAC 1411: SYZYGY-compatible Dual-channel 14-bit Digital-to-Analog Converter Module.
The Zmod AWG is one of Digilent's first SYZYGY-compliant expansion modules. The SYZYGY standard offers a much higher speed/bandwidth digital interface than Pmods, but at a much smaller and lower-cost form-factor than FMC, enabling the user to configure an FPGA development board with the right I/O for their application.
Driven by the SYZYGY carrier, the Zmod AWG can simultaneously generate two ±5V signals with 14 bits of resolution at a sample rate up to 100MS/s. Analog outputs can be connected to a circuit using SMA cables.
When coupled to a base board using SYZYGY expansion, like the Eclypse Z7 or Genesys ZU, the combination will serve as a powerful prototyping platform for instrumentation, high-speed control, and SDR . By utilizing these expansion capabilities, users can spend more time on the analytical and system-level aspects of the solution rather than having to focus on the component-level interactions of the devices.
Guides and demos are available to help you get started quickly with the Zmod AWG. These can be found through the Support Materials tab.
Channel type: single-ended
Absolute Resolution (amplitude ≤1.25V): 167μV
Absolute Resolution (amplitude >1.25V): 665μV
Sample rate (real time): 100MS/s
Output impedance: 50Ω
Analog bandwidth: 40 MHz+ @ 3dB, 20 MHz @ 0.5dB, 14 MHZ @ 0.1dB
Slew rate (2V step): 180V/μs
- Product Compliance:
- HTC: 8473301180
- ECCN: EAR99
- Zmod AWG 1411
- Screws for securing the Zmod to compatible host board (4 M3x5mm)
- Digilent custom packaging with protective foam
Digilent provides the Zmod Library along with both baremetal and PetaLinux software demos to support both the Zmod Scope and Zmod AWG. At the time of writing, only the Zmod AWG and Zmod Scope 1410-105 are supported. A hardware-only demo making use of the Eclypse's Zynq PL that supports all variants is available. Visit the Support Materials tab to access more information.
Quickly find what you need to get started and reduce mean time to test.
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