JTAG-HS3 Resource Center

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JTAG-HS3 Programming Cable
  • All-in-one JTAG programming solution for Xilinx FPGAs
  • Compatible with all Xilinx tools
  • JTAG/SPI bus at up to 30Mbit/sec
  • Uses micro-AB USB2 connector
  • Compatible with IEEE 1149.7-2009 Class T0 - Class T4
Product Compliance

The JTAG-HS3 programming cable is a high-speed programming/debugging solution for Xilinx FPGAs and SoCs. It is fully compatible will all Xilinx Tools, and can be seamlessly driven from iMPACT, ChipScope™, EDK, and Vivado™. The HS3 attaches to target boards using Xilinx’s 2×7, 2mm programming header.

The PC powers the JTAG-HS3 through the USB port and will recognize it as a Digilent programming cable when connected, even if the cable is not attached to the target board. The HS3 has a separate Vref pin to supply the JTAG signal buffers. The high speed 24mA three-state buffers allow the HS3 to drive target boards with signal voltages from 1.8V to 5V and bus speeds up to 30MBit/sec (see Fig. 1). To function correctly, the HS3’s Vref pin must be tied to the same voltage supply (VCCO_0) that drives the JTAG port on the FPGA.