Creating a Baremetal Boot Image for Zynq-7000 Devices

This guide will walk you through the process of creating a bootloader for a previously-created baremetal software application and loading it either into SPI flash or an SD card so that it can boot without being attached to a host computer.

Note: This guide does not cover the steps for creating a PetaLinux boot image.

Substantial UI changes in Vitis 2023.2 have changed much of the specifics of how to work with projects and this guide has not yet been updated. For a detailed rundown of changes, check out Adam Taylor's post about it on the adiuvoengineering blog.

Creating a Baremetal Boot Image

With the introduction of Vitis, Xilinx changed the process of creating the boot image. Select one of the two dropdowns below for your specific set of tools.

Xilinx SDK

First, you need to create a first-stage bootloader project. Fortunately, Xilinx provides a template for this that does not need to be modified in any way. Select the File → New → Application Project menu option.

Give your project a fitting name, like “fsbl”, then click “Next”.

Choose the “Zynq FSBL” option from the end of the menu, and click “Finish”. Congratulations, you now have a boot loader! Make sure to build it before continuing.

First, with your SDK workspace open, select the Xilinx → Create Boot Image menu option.

This wizard will let you define the contents of your boot image. First, select file paths where the boot image and BIF file - which stores the data entered here so that you can easily recreate the boot image when you later rebuild your project - will be written to. Then, “Add” the following three files to the image as partitions:

  1. The FSBL ELF file, found in the FSBL project's Debug folder.
  2. The bitstream that Vivado created for your hardware project, which can either be found in the hardware platform or in the Vivado project's .runs/impl_1 folder.
  3. The application project's ELF file, found in the application project's Debug folder.

Once these partitions are all present, click Create Image.


In Vitis, as long as the “Generate Boot Components” box was selected when the platform project was created from an XSA, the boot image will automatically be created whenever you build your system project.

The boot image can be found in the system project's Debug folder, in the “sd_card” folder.

Programming the Boot Image onto the Board

You can now load this Boot Image into one of a couple of kinds of nonvolatile storage. Which are supported depends on your board.

Flash Memory
The process of loading flash memory is the same regardless of what version of Vitis or Xilinx SDK you use (at least in recent versions >= 2019.1), so the screenshots presented here will only be for Vitis.

In the menu at the top of the window, select Xilinx → Program Flash.

In the dialog that pops up, Browse for and select your Boot Image in the Image File field. You might want to select a specific device instead of Auto Detecting if you have multiple plugged in. You might also want to perform verification steps, available in checkboxes at the bottom of the window. No offset needs to be specified - the only thing in flash will be the image.

Once the image is in flash, all you need to do to load it is to set your board's programming mode select jumper to SPI, then power cycle it. The mode and button may have different names, so make sure to check your board's reference manual for details.

microSD Card

You'll need a FAT32 formatted microSD card and some way to access its filesystem from your computer.

Load the image into your SD card, at the root of the filesystem. The name must be “BOOT.bin”.

In order to boot from the SD card, all you need to do is slot the SD card into the board's microSD card slot, set the board's programming mode select jumper to SD, then power cycle it. The mode may have a different name, so make sure to check your board's reference manual for details.

Next Steps

Find more guides supporting your Zynq development board on its resource center, which can be found through this site's Programmable Logic landing page.