Eclypse Z7 Low-Level Low-Pass Filter Demo

Description

The simplified block diagram of the system implemented for this demo is shown below:

An analog input coming from the Analog Discovery 2 (AD2) is connected to the Zmod Scope CH1, converted to a digital format and passed on to the input of a digital low pass filter. The filter's output is converted back to an analog format by the Zmod AWG and can be measured/visualized on the converter channel 1.

The input signal, after the analog to digital conversion, is also looped back to the Zmod AWG and connected to the CH2 output. The Analog Discovery 2's Network Analyzer instrument is then used to plot the frequency characteristic using the CH2 of the Zmod AWG as reference.

The purpose of the digital loopback is to correct the phase errors introduced by the ADC and Zmod Scope Controller latency and the gain errors caused by the mismatch between the ADC and the DAC full-scale voltages.

Regardless of the Zmod Scope used, the system uses a 40 MS/s sample rate for both the Zmod Scope input and Zmod AWG output.

With this setup the frequency response of the filter can be correctly measured regardless of the gain setting of the Zmod AWG.

Only the Zynq’s Programmable Logic (PL) is used for this project.

The IPs instantiated in the design and their functionality are described below:

• The Zmod Scope Controller - initializes the Zmod Scope hardware and synchronizes the incoming data in the user clock domain,
• A digital low pass filter – implemented using Xilinx FIR compiler 7.2 IP Core with the coefficients specified in Table 1, below.
• The Zmod AWG Controller - initializes the Zmod AWG hardware and formats the output data according to the AD9717 DAC requirements.

In the demo, the Zmod Scope CH1 is set to High Gain (+/-1V input range). The Zmod AWG CH1 and CH2 are set to Low Gain/Range (+/-1.25V output range).
Therefore, a signal applied to the Zmod Scope CH1 input, converted to numeric format and the result sent directly to the inputs of Zmod AWG will be amplified 1.25V/1V = 1.25 times.
If the user needs the AWG output voltage to have the same range as the Zmod Scope input, the numeric representation received from the Zmod Scope will need to be multiplied in the PL by 1/1.25 = 0.8.

Table 1. FIR Filter Coefficients

0.0031577,
0.0063382,
0.0117886,
0.0192569,
0.0285887,
0.0393138,
0.0506561,
0.0616162,
0.0711065,
0.0781057,
0.0818212,
0.0818212,
0.0781057,
0.0711065,
0.0616162,
0.0506561,
0.0393138,
0.0285887,
0.0192569,
0.0117886,
0.0063382,
0.0031577.

Inventory

Hardware

• Eclypse Z7
  • Including a Micro-USB cable and 12V Power Supply
• A Zmod Scope, one of the following:
  • Zmod Scope 1010
  • Zmod Scope 1210
  • Zmod Scope 1410
• Zmod AWG 1411
• Analog Discovery 2 (AD2)
• Discovery BNC Adapter
• BNC-to-SMA cables (or BNC-to-SMA adapters with BNC or SMA cables) are recommended

Software

• Vivado Design Suite 2019.1 with Digilent Board Support Files installed
  • Follow the Installing Vivado, Xilinx SDK, and Digilent Board Files guide on how to install Vivado and Digilent Board Support Files.
• Waveforms Software

Skills

• Basic familiarity with Vivado
  • This experience can be found by walking through our “Getting Started with Vivado” guide

Downloads

Advanced users may want to take a look at the branch of Eclypse Z7 repository containing the project.

Demo Setup

Hardware Setup

1. Connect the Analog Discovery 2 board to the host computer using a MicroUSB cable.

2. Connect the two Zmods, Scope and AWG, to the Zmod connectors of the Eclypse Z7 board as follows:

• Zmod Scope to ZMOD A connector of the Eclypse Z7
• Zmod AWG 1411 to ZMOD B connector of the Eclypse Z7

3. Connect the Eclypse Z7 board to the host computer using a MicroUSB cable through PROG MicroUSB port and power the board using the 12V Power Supply. Flip its power switch to turn it on.

4. Connect the BNC adapter to the Analog Discovery 2. Set the CH1 and CH2 coupling jumpers to DC and the W1 termination impedance jumper to “0”.

5. Make the following physical connections:

• Analog Discovery 2 Waveform Generator channel 1 (W1) to Zmod Scope CH1
• Zmod AWG CH1 to Analog Discovery 2 Oscilloscope channel 2 (CH2)
• Zmod AWG CH2 to Analog Discovery 2 Oscilloscope channel 1 (CH1)

Note: Since the Zmods use SMA connectors, use of BNC-to-SMA cables (or BNC-to-SMA adapters with BNC or SMA cables) is recommended for the Zmod to BNC Adapter physical connections.

Software Setup

1. Download and extract the Vivado project archive, linked in the Downloads section, above. Open the project in Vivado.

If you are using a variant of the Zmod Scope other than the 1410-105, check the following dropdown for instructions on modifying the project to support your Zmod and rebuilding it.

Rebuilding the Project for Other Zmod Scopes

If you are using a Zmod scope variant other than the Zmod Scope 1410-104, you will need to modify and rebuild the project for your Zmod.

Open the block design. Double click on the Zmod Scope Controller IP to reconfigure it. Pick your Zmod Scope variant from the ZmodID dropdown, then click OK.

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If your Zmod Scope has less than 14 bits of resolution, add a Slice IP to the block design to connect the Zmod port's data port (which is 14 bits wide) to the Zmod Scope Controller's data port. To do this, first click Add IP and search for “slice”.

Double click on the new slice IP to recustomize it, and select the following settings for the IP, depending on the data resolution of your Zmod: Resolution Din Width Din From Din Down To Dout Width 12 14 13 2 12 10 14 13 4 10

Delete the existing net between the dZmodADC_Data_0 port and the dZmodADC_Data_0 of the controller IP. Manually connect the Slice IP to each of the endpoints of the deleted net by clicking and dragging from one pin to another. You may need to connect from the slice's input port to the external port rather than the other way around.

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Validate the block design, then click Generate bitstream to build the project. When prompted, save the block design, and click Yes to allow Vivado to start both synthesis and implementation. Click OK to launch runs, then wait for the bitstream to finish being built.

Once you have a bitstream, you are ready to continue setting up the demo.

2. Download and extract the WaveForms workspace, linked in the Downloads section, above.

3. Make sure the boot mode jumper on the Eclypse Z7 is in the JTAG position.

4. Open the Hardware Manager tool from within Vivado and click Open target, Autoconnect:

5. Select the .bit file, or make sure it is already selected and is located at the correct path in the dialog (the bit file can be found in the project at hw.runs/impl_1/design_1_wrapper.bit), and program the board.

6. Open WaveForms, then open the workspace, “EclypseZ7VhdlFilterDemo.dwf3work”, included in the folder extracted from the demo archive. If you are prompted that the configuration of your AD2 will be changed, allow WaveForms to do so.

Hit the Run button of the Network Analyzer instrument.

Operating the Demo

The Network Analyzer will be used to generate a sinusoidal signal (perturbation) on the W1 channel. The bode plot (see below) is obtained considering the loopback signal (Zmod AWG CH2) as reference.

Final Notes

For more guides and example projects for your Eclypse Z7, please visit its Resource Center.

For more information about how to use the other Digilent products featured in this demo, please visit their respective Resource Centers:
Analog Discovery 2, BNC Adapter, Zmod Scope, Zmod AWG.

For technical support, please visit the Digilent Forums.