Device Usage Page (usage_statistics_webtalk.html)

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software_version_and_target_device
betaFALSE build_version3247384
date_generatedTue Aug 23 15:13:44 2022 os_platformWIN64
product_versionVivado v2021.1 (64-bit) project_id3b75551ece914ae98eb4ea9dc2865270
project_iteration1 random_idf1b197fcfcf756d8a9b8a0f5860629f1
registration_idf1b197fcfcf756d8a9b8a0f5860629f1 route_designTRUE
target_devicexc7a200t target_familyartix7
target_packagesbg484 target_speed-1
tool_flowVivado

user_environment
cpu_nameIntel(R) Xeon(R) CPU E5-1650 v2 @ 3.50GHz cpu_speed3492 MHz
os_nameWindows Server 2016 or Windows 10 os_releasemajor release (build 9200)
system_ram34.000 GB total_processors1

vivado_usage
gui_handlers
basedialog_ok=1 basedialog_yes=1 flownavigatortreepanel_flow_navigator_tree=1 mainmenumgr_tools=2
rdicommands_run_script=1
java_command_handlers
runbitgen=1 runscript=1
other_data
guimode=1
project_data
constraintsetcount=1 core_container=false currentimplrun=impl_1 currentsynthesisrun=synth_1
default_library=xil_defaultlib designmode=RTL export_simulation_activehdl=0 export_simulation_ies=0
export_simulation_modelsim=0 export_simulation_questa=0 export_simulation_riviera=0 export_simulation_vcs=0
export_simulation_xsim=0 implstrategy=Vivado Implementation Defaults launch_simulation_activehdl=0 launch_simulation_ies=0
launch_simulation_modelsim=0 launch_simulation_questa=0 launch_simulation_riviera=0 launch_simulation_vcs=0
launch_simulation_xsim=0 simulator_language=Mixed srcsetcount=13 synthesisstrategy=Vivado Synthesis Defaults
target_language=Verilog target_simulator=XSim totalimplruns=1 totalsynthesisruns=1

unisim_transformation
post_unisim_transformation
bufg=1 carry4=151 dsp48e1=1 fdre=329
fdse=8 gnd=18 ibuf=10 lut1=21
lut2=174 lut3=219 lut4=256 lut5=64
lut6=315 obuf=6 ramb18e1=3 vcc=11
xadc=1
pre_unisim_transformation
bufg=1 carry4=151 dsp48e1=1 fdre=329
fdse=8 gnd=18 ibuf=10 lut1=21
lut2=174 lut3=219 lut4=256 lut5=64
lut6=315 obuf=6 ramb18e1=3 vcc=11
xadc=1

phys_opt_design_post_place
command_line_options
-aggressive_hold_fix=default::[not_specified] -bram_register_opt=default::[not_specified] -clock_opt=default::[not_specified] -critical_cell_opt=default::[not_specified]
-critical_pin_opt=default::[not_specified] -directive=default::[not_specified] -dsp_register_opt=default::[not_specified] -effort_level=default::[not_specified]
-fanout_opt=default::[not_specified] -hold_fix=default::[not_specified] -insert_negative_edge_ffs=default::[not_specified] -multi_clock_opt=default::[not_specified]
-placement_opt=default::[not_specified] -restruct_opt=default::[not_specified] -retime=default::[not_specified] -rewire=default::[not_specified]
-shift_register_opt=default::[not_specified] -uram_register_opt=default::[not_specified] -verbose=default::[not_specified] -vhfn=default::[not_specified]

power_opt_design
command_line_options_spo
-cell_types=default::all -clocks=default::[not_specified] -exclude_cells=default::[not_specified] -include_cells=default::[not_specified]
usage
bram_ports_augmented=0 bram_ports_newly_gated=0 bram_ports_total=6 flow_state=default
slice_registers_augmented=0 slice_registers_newly_gated=0 slice_registers_total=337 srls_augmented=0
srls_newly_gated=0 srls_total=0

ip_statistics
blk_mem_gen_v8_4_4/1
c_addra_width=10 c_addrb_width=10 c_algorithm=1 c_axi_id_width=4
c_axi_slave_type=0 c_axi_type=1 c_byte_size=9 c_common_clk=0
c_count_18k_bram=1 c_count_36k_bram=0 c_ctrl_ecc_algo=NONE c_default_data=0
c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0 c_elaboration_dir=./ c_en_deepsleep_pin=0
c_en_ecc_pipe=0 c_en_rdaddra_chg=0 c_en_rdaddrb_chg=0 c_en_safety_ckt=0
c_en_shutdown_pin=0 c_en_sleep_pin=0 c_enable_32bit_address=0 c_est_power_summary=Estimated Power for IP _ 1.1884 mW
c_family=artix7 c_has_axi_id=0 c_has_ena=0 c_has_enb=0
c_has_injecterr=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0 c_has_mux_output_regs_a=0
c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0 c_has_rsta=0
c_has_rstb=0 c_has_softecc_input_regs_a=0 c_has_softecc_output_regs_b=0 c_init_file=charLib.mem
c_init_file_name=[user-defined] c_inita_val=0 c_initb_val=0 c_interface_type=0
c_load_init_file=1 c_mem_type=3 c_mux_pipeline_stages=0 c_prim_type=1
c_read_depth_a=1024 c_read_depth_b=1024 c_read_latency_a=1 c_read_latency_b=1
c_read_width_a=8 c_read_width_b=8 c_rst_priority_a=CE c_rst_priority_b=CE
c_rstram_a=0 c_rstram_b=0 c_sim_collision_check=ALL c_use_bram_block=0
c_use_byte_wea=0 c_use_byte_web=0 c_use_default_data=0 c_use_ecc=0
c_use_softecc=0 c_use_uram=0 c_wea_width=1 c_web_width=1
c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST c_write_mode_b=WRITE_FIRST
c_write_width_a=8 c_write_width_b=8 c_xdevicefamily=artix7 core_container=false
iptotal=1 x_ipcorerevision=4 x_iplanguage=VERILOG x_iplibrary=ip
x_ipname=blk_mem_gen x_ipproduct=Vivado 2020.1 x_ipsimlanguage=MIXED x_ipvendor=xilinx.com
x_ipversion=8.4
blk_mem_gen_v8_4_4/2
c_addra_width=4 c_addrb_width=4 c_algorithm=1 c_axi_id_width=4
c_axi_slave_type=0 c_axi_type=1 c_byte_size=9 c_common_clk=0
c_count_18k_bram=1 c_count_36k_bram=0 c_ctrl_ecc_algo=NONE c_default_data=0
c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0 c_elaboration_dir=./ c_en_deepsleep_pin=0
c_en_ecc_pipe=0 c_en_rdaddra_chg=0 c_en_rdaddrb_chg=0 c_en_safety_ckt=0
c_en_shutdown_pin=0 c_en_sleep_pin=0 c_enable_32bit_address=0 c_est_power_summary=Estimated Power for IP _ 2.7096 mW
c_family=artix7 c_has_axi_id=0 c_has_ena=0 c_has_enb=0
c_has_injecterr=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0 c_has_mux_output_regs_a=0
c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0 c_has_rsta=0
c_has_rstb=0 c_has_softecc_input_regs_a=0 c_has_softecc_output_regs_b=0 c_init_file=init_sequence_rom.mem
c_init_file_name=[user-defined] c_inita_val=0 c_initb_val=0 c_interface_type=0
c_load_init_file=1 c_mem_type=3 c_mux_pipeline_stages=0 c_prim_type=1
c_read_depth_a=16 c_read_depth_b=16 c_read_latency_a=1 c_read_latency_b=1
c_read_width_a=16 c_read_width_b=16 c_rst_priority_a=CE c_rst_priority_b=CE
c_rstram_a=0 c_rstram_b=0 c_sim_collision_check=ALL c_use_bram_block=0
c_use_byte_wea=0 c_use_byte_web=0 c_use_default_data=0 c_use_ecc=0
c_use_softecc=0 c_use_uram=0 c_wea_width=1 c_web_width=1
c_write_depth_a=16 c_write_depth_b=16 c_write_mode_a=WRITE_FIRST c_write_mode_b=WRITE_FIRST
c_write_width_a=16 c_write_width_b=16 c_xdevicefamily=artix7 core_container=false
iptotal=1 x_ipcorerevision=4 x_iplanguage=VERILOG x_iplibrary=ip
x_ipname=blk_mem_gen x_ipproduct=Vivado 2020.1 x_ipsimlanguage=MIXED x_ipvendor=xilinx.com
x_ipversion=8.4
blk_mem_gen_v8_4_4/3
c_addra_width=9 c_addrb_width=9 c_algorithm=1 c_axi_id_width=4
c_axi_slave_type=0 c_axi_type=1 c_byte_size=9 c_common_clk=1
c_count_18k_bram=1 c_count_36k_bram=0 c_ctrl_ecc_algo=NONE c_default_data=0
c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0 c_elaboration_dir=./ c_en_deepsleep_pin=0
c_en_ecc_pipe=0 c_en_rdaddra_chg=0 c_en_rdaddrb_chg=0 c_en_safety_ckt=0
c_en_shutdown_pin=0 c_en_sleep_pin=0 c_enable_32bit_address=0 c_est_power_summary=Estimated Power for IP _ 2.68455 mW
c_family=artix7 c_has_axi_id=0 c_has_ena=0 c_has_enb=0
c_has_injecterr=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0 c_has_mux_output_regs_a=0
c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0 c_has_rsta=0
c_has_rstb=0 c_has_softecc_input_regs_a=0 c_has_softecc_output_regs_b=0 c_init_file=pixel_buffer.mem
c_init_file_name=no_coe_file_loaded c_inita_val=0 c_initb_val=0 c_interface_type=0
c_load_init_file=0 c_mem_type=1 c_mux_pipeline_stages=0 c_prim_type=1
c_read_depth_a=512 c_read_depth_b=512 c_read_latency_a=1 c_read_latency_b=1
c_read_width_a=8 c_read_width_b=8 c_rst_priority_a=CE c_rst_priority_b=CE
c_rstram_a=0 c_rstram_b=0 c_sim_collision_check=ALL c_use_bram_block=0
c_use_byte_wea=0 c_use_byte_web=0 c_use_default_data=0 c_use_ecc=0
c_use_softecc=0 c_use_uram=0 c_wea_width=1 c_web_width=1
c_write_depth_a=512 c_write_depth_b=512 c_write_mode_a=NO_CHANGE c_write_mode_b=READ_FIRST
c_write_width_a=8 c_write_width_b=8 c_xdevicefamily=artix7 core_container=false
iptotal=1 x_ipcorerevision=4 x_iplanguage=VERILOG x_iplibrary=ip
x_ipname=blk_mem_gen x_ipproduct=Vivado 2020.1 x_ipsimlanguage=MIXED x_ipvendor=xilinx.com
x_ipversion=8.4
xadc_wiz_v3_3_8/1
channel_averaging=None component_name=xadc_wiz_0 core_container=false dclk_frequency=100
enable_axi=false enable_axi4stream=false enable_busy=true enable_convst=false
enable_convstclk=false enable_dclk=true enable_drp=true enable_eoc=true
enable_eos=true enable_vbram_alaram=false enable_vccaux_alaram=true enable_vccddro_alaram=false
enable_vccint_alaram=false enable_vccpaux_alaram=false enable_vccpint_alaram=false iptotal=1
ot_alaram=false sequencer_mode=on startup_channel_selection=contineous_sequence timing_mode=continuous
user_temp_alaram=true

report_design_analysis
command_line_options
-append=default::[not_specified] -bounding_boxes=default::[not_specified] -cells=default::[not_specified] -complexity=default::[not_specified]
-congestion=default::[not_specified] -end_point_clocks=default::[not_specified] -extend=default::[not_specified] -extract_metrics=default::[not_specified]
-file=default::[not_specified] -full_logical_pin=default::[not_specified] -hierarchical_depth=default::[not_specified] -hold=default::[not_specified]
-logic_level_dist_paths=default::[not_specified] -logic_level_distribution=default::[not_specified] -logic_levels=default::[not_specified] -max_level=default::[not_specified]
-max_paths=default::[not_specified] -min_congestion_level=default::5 -min_level=default::[not_specified] -name=default::[not_specified]
-no_header=default::[not_specified] -of_timing_paths=default::[not_specified] -pploc_distance=default::[not_specified] -qor_summary=[specified]
-quiet=default::[not_specified] -return_string=default::[not_specified] -return_timing_paths=default::[not_specified] -routed_vs_estimated=default::[not_specified]
-routes=default::[not_specified] -setup=default::[not_specified] -show_all_congestion_windows=default::false -suggestion=default::[not_specified]
-timing=default::[not_specified] -verbose=default::[not_specified]
usage
runtime=0.234 secs
usage_count
qor_summary=4

report_drc
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -internal=default::[not_specified] -internal_only=default::[not_specified] -max_msgs_per_check=default::[not_specified]
-messages=default::[not_specified] -name=default::[not_specified] -no_waivers=default::[not_specified] -return_string=default::[not_specified]
-ruledecks=default::[not_specified] -upgrade_cw=default::[not_specified] -waived=default::[not_specified]
results
cfgbvs-1=1 dpip-1=1 dpop-1=1 dpop-2=1

report_methodology
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -merge_exceptions =default::[not_specified] -messages=default::[not_specified] -name=default::[not_specified]
-return_string=default::[not_specified] -slack_lesser_than=default::[not_specified] -waived=default::[not_specified]
results
timing-17=343

report_power
command_line_options
-advisory=default::[not_specified] -append=default::[not_specified] -file=[specified] -format=default::text
-hier=default::power -hierarchical_depth=default::4 -l=default::[not_specified] -name=default::[not_specified]
-no_propagation=default::[not_specified] -return_string=default::[not_specified] -rpx=[specified] -verbose=default::[not_specified]
-vid=default::[not_specified] -xpe=default::[not_specified]
usage
airflow=250 (LFM) ambient_temp=25.0 (C) bi-dir_toggle=12.500000 bidir_output_enable=1.000000
board_layers=12to15 (12 to 15 Layers) board_selection=medium (10"x10") bram=0.275226 confidence_level_clock_activity=Low
confidence_level_design_state=High confidence_level_device_models=High confidence_level_internal_activity=Medium confidence_level_io_activity=Low
confidence_level_overall=Low customer=TBD customer_class=TBD devstatic=0.598369
die=xc7a200tsbg484-1 dsp=0.997776 dsp_output_toggle=12.500000 dynamic=18.921541
effective_thetaja=3.31 enable_probability=0.990000 family=artix7 ff_toggle=12.500000
flow_state=routed heatsink=medium (Medium Profile) i/o=2.193546 input_toggle=12.500000
junction_temp=89.7 (C) logic=8.734522 mgtavcc_dynamic_current=0.000000 mgtavcc_static_current=0.000000
mgtavcc_total_current=0.000000 mgtavcc_voltage=1.000000 mgtavtt_dynamic_current=0.000000 mgtavtt_static_current=0.000000
mgtavtt_total_current=0.000000 mgtavtt_voltage=1.200000 netlist_net_matched=NA off-chip_power=0.000000
on-chip_power=19.519910 output_enable=1.000000 output_load=5.000000 output_toggle=12.500000
package=sbg484 pct_clock_constrained=2.000000 pct_inputs_defined=0 platform=nt64
process=typical ram_enable=50.000000 ram_write=50.000000 read_saif=False
set/reset_probability=0.000000 signal_rate=False signals=6.599221 simulation_file=None
speedgrade=-1 static_prob=False temp_grade=commercial thetajb=5.0 (C/W)
thetasa=4.6 (C/W) toggle_rate=False user_board_temp=25.0 (C) user_effective_thetaja=3.31
user_junc_temp=89.7 (C) user_thetajb=5.0 (C/W) user_thetasa=4.6 (C/W) vccadc_dynamic_current=0.050000
vccadc_static_current=0.020000 vccadc_total_current=0.070000 vccadc_voltage=1.800000 vccaux_dynamic_current=0.079062
vccaux_io_dynamic_current=0.000000 vccaux_io_static_current=0.000000 vccaux_io_total_current=0.000000 vccaux_io_voltage=1.800000
vccaux_static_current=0.081466 vccaux_total_current=0.160528 vccaux_voltage=1.800000 vccbram_dynamic_current=0.016734
vccbram_static_current=0.013503 vccbram_total_current=0.030237 vccbram_voltage=1.000000 vccint_dynamic_current=16.657261
vccint_static_current=0.385727 vccint_total_current=17.042988 vccint_voltage=1.000000 vcco12_dynamic_current=0.000000
vcco12_static_current=0.000000 vcco12_total_current=0.000000 vcco12_voltage=1.200000 vcco135_dynamic_current=0.000000
vcco135_static_current=0.000000 vcco135_total_current=0.000000 vcco135_voltage=1.350000 vcco15_dynamic_current=0.000000
vcco15_static_current=0.000000 vcco15_total_current=0.000000 vcco15_voltage=1.500000 vcco18_dynamic_current=0.000000
vcco18_static_current=0.000000 vcco18_total_current=0.000000 vcco18_voltage=1.800000 vcco25_dynamic_current=0.000000
vcco25_static_current=0.000000 vcco25_total_current=0.000000 vcco25_voltage=2.500000 vcco33_dynamic_current=0.610677
vcco33_static_current=0.005000 vcco33_total_current=0.615677 vcco33_voltage=3.300000 version=2021.1
xadc=0.121250

report_utilization
clocking
bufgctrl_available=32 bufgctrl_fixed=0 bufgctrl_prohibited=0 bufgctrl_used=2
bufgctrl_util_percentage=6.25 bufhce_available=120 bufhce_fixed=0 bufhce_prohibited=0
bufhce_used=0 bufhce_util_percentage=0.00 bufio_available=40 bufio_fixed=0
bufio_prohibited=0 bufio_used=0 bufio_util_percentage=0.00 bufmrce_available=20
bufmrce_fixed=0 bufmrce_prohibited=0 bufmrce_used=0 bufmrce_util_percentage=0.00
bufr_available=40 bufr_fixed=0 bufr_prohibited=0 bufr_used=0
bufr_util_percentage=0.00 mmcme2_adv_available=10 mmcme2_adv_fixed=0 mmcme2_adv_prohibited=0
mmcme2_adv_used=0 mmcme2_adv_util_percentage=0.00 plle2_adv_available=10 plle2_adv_fixed=0
plle2_adv_prohibited=0 plle2_adv_used=0 plle2_adv_util_percentage=0.00
dsp
dsp48e1_only_used=1 dsps_available=740 dsps_fixed=0 dsps_prohibited=0
dsps_used=1 dsps_util_percentage=0.14
io_standard
blvds_25=0 diff_hstl_i=0 diff_hstl_i_18=0 diff_hstl_ii=0
diff_hstl_ii_18=0 diff_hsul_12=0 diff_mobile_ddr=0 diff_sstl135=0
diff_sstl135_r=0 diff_sstl15=0 diff_sstl15_r=0 diff_sstl18_i=0
diff_sstl18_ii=0 hstl_i=0 hstl_i_18=0 hstl_ii=0
hstl_ii_18=0 hsul_12=0 lvcmos12=1 lvcmos15=0
lvcmos18=0 lvcmos25=0 lvcmos33=1 lvds_25=0
lvttl=0 mini_lvds_25=0 mobile_ddr=0 pci33_3=0
ppds_25=0 rsds_25=0 sstl135=0 sstl135_r=0
sstl15=0 sstl15_r=0 sstl18_i=0 sstl18_ii=0
tmds_33=0
memory
block_ram_tile_available=365 block_ram_tile_fixed=0 block_ram_tile_prohibited=0 block_ram_tile_used=1.5
block_ram_tile_util_percentage=0.41 ramb18_available=730 ramb18_fixed=0 ramb18_prohibited=0
ramb18_used=3 ramb18_util_percentage=0.41 ramb18e1_only_used=3 ramb36_fifo_available=365
ramb36_fifo_fixed=0 ramb36_fifo_prohibited=0 ramb36_fifo_used=0 ramb36_fifo_util_percentage=0.00
primitives
bufg_functional_category=Clock bufg_used=2 carry4_functional_category=CarryLogic carry4_used=151
dsp48e1_functional_category=Block Arithmetic dsp48e1_used=1 fdre_functional_category=Flop & Latch fdre_used=329
fdse_functional_category=Flop & Latch fdse_used=8 ibuf_functional_category=IO ibuf_used=10
lut1_functional_category=LUT lut1_used=20 lut2_functional_category=LUT lut2_used=174
lut3_functional_category=LUT lut3_used=219 lut4_functional_category=LUT lut4_used=256
lut5_functional_category=LUT lut5_used=64 lut6_functional_category=LUT lut6_used=315
obuf_functional_category=IO obuf_used=6 ramb18e1_functional_category=Block Memory ramb18e1_used=3
xadc_functional_category=Others xadc_used=1
slice_logic
f7_muxes_available=66900 f7_muxes_fixed=0 f7_muxes_prohibited=400 f7_muxes_used=0
f7_muxes_util_percentage=0.00 f8_muxes_available=33450 f8_muxes_fixed=0 f8_muxes_prohibited=200
f8_muxes_used=0 f8_muxes_util_percentage=0.00 lut_as_logic_available=133800 lut_as_logic_fixed=0
lut_as_logic_prohibited=800 lut_as_logic_used=792 lut_as_logic_util_percentage=0.59 lut_as_memory_available=46200
lut_as_memory_fixed=0 lut_as_memory_prohibited=0 lut_as_memory_used=0 lut_as_memory_util_percentage=0.00
register_as_flip_flop_available=269200 register_as_flip_flop_fixed=0 register_as_flip_flop_prohibited=0 register_as_flip_flop_used=337
register_as_flip_flop_util_percentage=0.13 register_as_latch_available=269200 register_as_latch_fixed=0 register_as_latch_prohibited=0
register_as_latch_used=0 register_as_latch_util_percentage=0.00 slice_luts_available=133800 slice_luts_fixed=0
slice_luts_prohibited=800 slice_luts_used=792 slice_luts_util_percentage=0.59 slice_registers_available=269200
slice_registers_fixed=0 slice_registers_prohibited=0 slice_registers_used=337 slice_registers_util_percentage=0.13
lut_as_distributed_ram_fixed=0 lut_as_distributed_ram_used=0 lut_as_logic_available=133800 lut_as_logic_fixed=0
lut_as_logic_prohibited=800 lut_as_logic_used=792 lut_as_logic_util_percentage=0.59 lut_as_memory_available=46200
lut_as_memory_fixed=0 lut_as_memory_prohibited=0 lut_as_memory_used=0 lut_as_memory_util_percentage=0.00
lut_as_shift_register_fixed=0 lut_as_shift_register_used=0 lut_in_front_of_the_register_is_unused_available=0 lut_in_front_of_the_register_is_unused_fixed=0
lut_in_front_of_the_register_is_unused_prohibited=0 lut_in_front_of_the_register_is_unused_used=102 lut_in_front_of_the_register_is_used_available=102 lut_in_front_of_the_register_is_used_fixed=102
lut_in_front_of_the_register_is_used_prohibited=102 lut_in_front_of_the_register_is_used_used=45 register_driven_from_outside_the_slice_fixed=45 register_driven_from_outside_the_slice_used=147
register_driven_from_within_the_slice_fixed=147 register_driven_from_within_the_slice_used=190 slice_available=33450 slice_fixed=0
slice_prohibited=200 slice_registers_available=269200 slice_registers_fixed=0 slice_registers_prohibited=0
slice_registers_used=337 slice_registers_util_percentage=0.13 slice_used=274 slice_util_percentage=0.82
slicel_fixed=0 slicel_used=164 slicem_fixed=0 slicem_used=110
unique_control_sets_available=33450 unique_control_sets_fixed=33450 unique_control_sets_prohibited=200 unique_control_sets_used=32
unique_control_sets_util_percentage=0.10 using_o5_and_o6_available=0.10 using_o5_and_o6_fixed=0.10 using_o5_and_o6_prohibited=0.10
using_o5_and_o6_used=256 using_o5_output_only_available=256 using_o5_output_only_fixed=256 using_o5_output_only_prohibited=256
using_o5_output_only_used=0 using_o6_output_only_available=0 using_o6_output_only_fixed=0 using_o6_output_only_prohibited=0
using_o6_output_only_used=536
specific_feature
bscane2_available=4 bscane2_fixed=0 bscane2_prohibited=0 bscane2_used=0
bscane2_util_percentage=0.00 capturee2_available=1 capturee2_fixed=0 capturee2_prohibited=0
capturee2_used=0 capturee2_util_percentage=0.00 dna_port_available=1 dna_port_fixed=0
dna_port_prohibited=0 dna_port_used=0 dna_port_util_percentage=0.00 efuse_usr_available=1
efuse_usr_fixed=0 efuse_usr_prohibited=0 efuse_usr_used=0 efuse_usr_util_percentage=0.00
frame_ecce2_available=1 frame_ecce2_fixed=0 frame_ecce2_prohibited=0 frame_ecce2_used=0
frame_ecce2_util_percentage=0.00 icape2_available=2 icape2_fixed=0 icape2_prohibited=0
icape2_used=0 icape2_util_percentage=0.00 pcie_2_1_available=1 pcie_2_1_fixed=0
pcie_2_1_prohibited=0 pcie_2_1_used=0 pcie_2_1_util_percentage=0.00 startupe2_available=1
startupe2_fixed=0 startupe2_prohibited=0 startupe2_used=0 startupe2_util_percentage=0.00
xadc_available=1 xadc_fixed=1 xadc_prohibited=0 xadc_used=1
xadc_util_percentage=100.00

synthesis
command_line_options
-assert=default::[not_specified] -bufg=default::12 -cascade_dsp=default::auto -constrset=default::[not_specified]
-control_set_opt_threshold=default::auto -debug_log=default::[not_specified] -directive=default::default -fanout_limit=default::10000
-flatten_hierarchy=default::rebuilt -fsm_extraction=default::auto -gated_clock_conversion=default::off -generic=default::[not_specified]
-include_dirs=default::[not_specified] -incremental=default::[not_specified] -keep_equivalent_registers=default::[not_specified] -lint=default::[not_specified]
-max_bram=default::-1 -max_bram_cascade_height=default::-1 -max_dsp=default::-1 -max_uram=default::-1
-max_uram_cascade_height=default::-1 -mode=default::default -name=default::[not_specified] -no_lc=default::[not_specified]
-no_srlextract=default::[not_specified] -no_timing_driven=default::[not_specified] -os=default::[not_specified] -part=xc7a200tsbg484-1
-resource_sharing=default::auto -retiming=default::[not_specified] -rtl=default::[not_specified] -rtl_skip_constraints=default::[not_specified]
-rtl_skip_ip=default::[not_specified] -seu_protect=default::none -sfcu=default::[not_specified] -shreg_min_size=default::3
-top=top -verilog_define=default::[not_specified]
usage
elapsed=00:00:47s hls_ip=0 memory_gain=143.988MB memory_peak=1410.512MB