~~NOTOC~~ 
    
====== Nexys Video ======
{{Digilent Infobox
| Store Page = https://digilent.com/shop/nexys-video-artix-7-fpga-trainer-board-for-multimedia-applications/
| Manual = [[reference-manual]]
| Support = https://forum.digilent.com/forum/4-fpga/
| Title = Nexys Video
| Subtitle = Artix-7 FPGA
| Header = Features
| Bullet = Programmable over JTAG and Quad-SPI Flash
| Bullet = On-chip analog-to-digital converter
| Header = Key Specifications
| FPGA Part # = XC7A200T-1SBG484C
| Logic Slices =  33,650 (4 6-input LUTs & \\ 8 flip-flops each)
| Block RAM = 13Mbits
| Clock Tiles = 10 (each with PLL)
| DSP Slices = 740
| Internal clock = 450MHz+
| Transceivers = 3.75Gbps GTP transceivers
| DDR3 = 512MB 800MT/s
| Quad-SPI Flash = 32MB
| Ethernet = 10/100/1000 PHY w/ \\ included unique MAC address
| Header = Connectivity and Onboard I/O
| SD = microSD slot for non-volatile storage
| Pmod Connectors = 3 Pmod ports
| HDMI = HDMI sink and HDMI source
| Audio = 240-bit codec w/ four 3.5mm jacks
| Display = 128x32 monochrome OLED
| Switches = 8
| Buttons = 5
| LEDs = 8
| Header = Electrical
| Power = Powered from any 12V source
| Logic Level = 3.3V
| Header = Physical
| Width = 5.3 in
| Length = 5.3 in
}}

{{page>reference-manual}} \\ \\

===== Documentation =====
{{topic>nexys-video +doc -legacy}}

**Note:** //Xilinx software tools are not available for download in some countries. Prior to purchasing the Nexys Video, please check the supporting software's availability, as it is required for the board's use.//

----
===== Tutorials =====

  * [[programmable-logic:guides:installing-vivado-and-vitis]]
    * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards.
  * [[programmable-logic:guides:getting-started-with-ipi]]
    * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs.
  * [[programmable-logic:guides:getting-started-with-vivado]]
    * Walks through using Vivado to create a simple design that blinks a single LED.
  * [[learn/programmable-logic/tutorials/pmod-ips/start]]
    * Digilent Pmod IPs can be used to control connected Pmods from baremetal software.
    * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older.

  * [[learn/programmable-logic/tutorials/htsspisf/start]]
  * [[learn/programmable-logic/tutorials/nexys-video-getting-started-with-microblaze-servers/start]]
  * [[learn/programmable-logic/tutorials/nexys-video-programming-guide/start]]

  * [[https://forum.digilent.com/topic/27389-arty-a7-microblaze-ddr3-tutorial/]]
    * The user Viktor Nikolov posted a tutorial on the Digilent Forum showing an alternate architecture for clocking the DDR interface for Digilent boards when using MicroBlaze. It works around several errors that may occur in other guides linked here.

----
===== Example Projects =====
{{topic>nexys-video +project -legacy}}

  * [[./demos/oled]]

----
===== Community Projects =====
{{Digilent Hackster
| product = "Nexys-Video"
}}  

  * [[https://support.xilinx.com/s/article/777077|Adam Taylor: Basic Video Processing on Nexys Video]]
  * [[https://support.xilinx.com/s/article/778385|Adam Taylor: Software for a Nexys Video Project]]

----
===== Additional Resources =====
  * [[learn:programmable-logic:tutorials:nexys-video-dpti-demo:start:|Nexys Video DPTI Demo]]
  * [[learn:programmable-logic:tutorials:nexys-video-looper-demo:start:|Nexys Video Music Looper Demo]]
  * [[learn:programmable-logic:tutorials:nexys-video-user-demo:start:|Nexys Video User Demo]]
  * {{https://files.digilent.com/resources/programmable-logic/nexys-video/Nexys-Video_SoV.pdf|Statement of Volatility}}
  * {{/reference/programmable-logic/nexys-video/nexys_video_fmc_to_fpga_connections.pdf|Nexys Video FMC to FPGA Connections}}
  * {{:reference:programmable-logic:nexys-video:nexys_video.zip|3D CAD Model}}
  * {{:reference:programmable-logic:nexys-video:nexys_video_dimensions.zip| Mechanical Drawings}}
  * {{ :reference:programmable-logic:nexys-video:nexysvideomig.zip |ZIP archive}} including NexysVideoMIG.prj and NexysVideoMIG.ucf files for use of Xilinx's Memory Interface Generator with a Native Interface

----

{{tag>programmable-logic programmable-logic-start nexys-video resource-center}}