~~NOTOC~~ ====== Nexys A7 ====== {{Digilent Infobox | Store Page = https://digilent.com/shop/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/ | Manual = [[reference-manual]] | Support = https://forum.digilent.com/forum/4-fpga/ | Title = Nexys A7 | Subtitle = Artix-7 FPGA | Header = Features | Bullet = Programmable over JTAG and Quad-SPI Flash | Bullet = On-chip analog-to-digital converter | Header = Key FPGA Specifications | Part Number = XC7A100T-1CSG324C \\ (XC7A50T-1CSG324I*) | Logic Slices = 15,850 (8,150*) | 6-Input LUTs = 63,400 (32,600*) | Flip-Flops = 126,800 (65,200*) | Block RAM = 4,860 Kb (2,700 Kb*) | DSP Slices = 240 (120*) | Clock Resources = 6 PLLs & 6 MMCMs (5 PLLs & 5 MMCMs*) | Internal ADC = Dual-channel, 1 MSPS | Bullet = (*A7-50T variant value in parentheses where different) | Header = Connectivity, Memories, and On-board I/O | DDR2 = 128 MiB | Ethernet = 10/100 PHY | SD = microSD card connector | Pmod Connectors = Four Pmod ports \\ One XADC Pmod port | VGA = 12-bit VGA port | Audio = PWM audio output | Microphone = PDM mic | Temp sensor = One temperature sensor | Display = Two 4-digit seven-segment displays | Switches = 16 | Buttons = 5 | LEDs = 16 | Tri-Color LEDs = 2 | Header = Electrical | Power Inputs = USB \\ 5V (2.5mm coaxial) supply | Header = Physical | Width = 4.3 in | Length = 4.8 in | Header = Product Compliance | HTC = 8471500150 | ECCN = 5A992.c }} {{page>reference-manual}} \\ \\ ===== Documentation ===== * [[reference-manual]] * [[/learn/programmable-logic/doc/datasheets/7-series-fpgas-overview]] * [[/learn/programmable-logic/doc/github/digilent-xdc]] * {{/programmable-logic/nexys-a7/nexys-a7-d3-sch.pdf|Nexys A7 Revision D.3 Schematic}} * {{/reference/programmable-logic/nexys-a7/nexys-a7-d2-sch.pdf|Nexys A7 Revision D.2 Schematic}} * {{/reference/programmable-logic/nexys-a7/nexys-a7-sch.pdf|Nexys A7 Revision D.0 Schematic}} * {{https://files.digilent.com/resources/programmable-logic/documents/S25FL127S_PCN.pdf|Product Change Notice - Flash Memory}} **Note:** //Xilinx software tools are not available for download in some countries. Prior to purchasing the Nexys A7, please check the supporting software's availability, as it is required for the board's use.// ---- ===== Tutorials ===== * [[programmable-logic:guides:installing-vivado-and-vitis]] * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards. * [[programmable-logic:guides:getting-started-with-ipi]] * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs. * [[programmable-logic:guides:getting-started-with-vivado]] * Walks through using Vivado to create a simple design that blinks a single LED. * [[learn/programmable-logic/tutorials/pmod-ips/start]] * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. * [[programmable-logic/guides/simulation]] * Learn how to use Vivado's built-in simulator for the first time * [[https://forum.digilent.com/topic/27389-arty-a7-microblaze-ddr3-tutorial/]] * The user Viktor Nikolov posted a tutorial on the Digilent Forum showing an alternate architecture for clocking the DDR interface for Digilent boards when using MicroBlaze. It works around several errors that may occur in other guides linked here. ---- ===== Example Projects ===== === Demos Supporting Vivado 2022.1=== * [[./demos/keyboard]] * [[./demos/xadc]] * [[./demos/gpio]] * [[./demos/oob]] === Other Demos === * [[/programmable-logic/nexys-a7/nexys-a7-50t-dma-audio]] * [[/programmable-logic/nexys-a7/nexys-a7-100t-dma-audio]] ---- ===== Additional Resources ===== * [[programmable-logic:nexys-4-ddr:|Nexys 4 DDR Resource Center]] - Resources originally created for the Nexys 4 DDR board may be useful to users of the Nexys A7, as the boards are, for all intensive purposes, identical. * {{:reference:programmable-logic:nexys-a7:nexys_4_ddr.zip|Nexys A7 3D model}} * {{:reference:programmable-logic:nexys-a7:nexys_a7_dimensions.zip| Nexys A7 Mechanical Drawings}} ---- {{tag>programmable-logic programmable-logic-start nexys-a7 resource-center}}