====== Cmod S7-25 Microblaze XADC Demo =====

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===== Description =====
This project demonstrates how to use the Cmod S7-25's Spartan 7 FPGA's analog-to-digital core (referred to as the XADC) with a Microblaze processor. Vivado is used to build the demo's hardware platform, and Xilinx SDK is used to program the bitstream onto the board and to build and deploy a C application.

To use this demo, the Cmod S7 must be connected to a computer over MicroUSB, which must be running a serial terminal (such as Tera Term or PuTTY).

As long as the demo is running, ten times per second, the voltages on each of the Cmod S7-25's DIP header's analog input pins (AIN32 and AIN33) are read and printed to a connected serial terminal. The readings are accurate to two decimal places. Any voltages less than 0 Volts or greater than 3.3 Volts are read as those instead.

**Important!** //Take care not to apply a voltage greater than 5.5 Volts to the analog pins, as higher voltages may cause damage to the device.//
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===== Inventory =====

  * Cmod S7-25 with a MicroUSB Programming Cable
  * Vivado and Vitis Installations compatible with the latest release of this demo (2020.1)
    * //See [[programmable-logic:guides:installing-vivado-and-vitis]] for instructions on how to install Vivado.//
  * Serial Terminal application
    * //See [[programmable-logic:guides:serial-terminals:start]] for more information.//
  * A circuit to measure voltages from (breadboard recommended)

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===== Download and Usage Instructions =====

First and foremost, releases are only compatible with the version of the Xilinx tools specified in the release version number. In addition, releases are only compatible with the specified variant of the board. For example, a release tagged "20/DMA/2020.1" for the Zybo Z7 is only to be used with the -20 variant of the board and Xilinx tools of version 2020.1 (Vivado and Vitis).

The latest release tag for this demo is highlighted in green, and release candidates (which may not be fully tested, and should be used at your own risk, are highlighted in yellow.

**Note:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.//

**Important:** //The setup instructions found in this section only pertain to the latest release.//

^ Release Tag                   ^ Release Downloads                                                                            ^ Setup Instructions  ^
| @#C0EEBD: 25/XADC/2023.1-1    | {{https://github.com/Digilent/Cmod-S7/releases/download/25/XADC/2023.1-1/Cmod-S7-XADC-hw.xpr.zip}} \\ {{https://github.com/Digilent/Cmod-S7/releases/download/25/XADC/2023.1-1/Cmod-S7-XADC-sw.ide.zip}}  | See Below           |
| 25/XADC/2020.1-1              | {{https://github.com/Digilent/Cmod-S7/releases/download/25/XADC/2020.1-1/Cmod-S7-XADC-hw.xpr.zip}} \\ {{https://github.com/Digilent/Cmod-S7/releases/download/25/XADC/2020.1-1/Cmod-S7-XADC-sw.ide.zip}}  | See Below           |
| v2018.2-2                     | [[https://github.com/Digilent/Cmod-S7-25-XADC/releases/tag/v2018.2-2|Release ZIP downloads]]  | [[https://github.com/Digilent/Cmod-S7-25-XADC/tree/v2018.2-2|v2018.2-2 README]]  |
| v2017.4-1                     | [[https://github.com/Digilent/Cmod-S7-25-XADC/releases/tag/v2017.4-1|Release ZIP downloads]]  | [[https://github.com/Digilent/Cmod-S7-25-XADC/tree/v2017.4-1|v2017.4-1 README]]  |

**Note for Advanced Users:** //GitHub sources for this demo can be found in the [[https://github.com/digilent/cmod-s7/tree/25/XADC/master|25/XADC/master]] branch of the Cmod-S7 repository. Further documentation on the structure of this repository can be found on this wiki's [[programmable-logic:documents:git]] page.//

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Instructions on the use of the latest release can be found in this dropdown:

--> Using the Latest Release #^
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{{page>programmable-logic:guides:using-github-releases#baremetal_release_before_programming&noheader}}
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--> Set up the Cmod S7 #
Plug your Cmod S7 into your computer via the MicroUSB programming cable. 
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{{page>programmable-logic:guides:using-github-releases#baremetal_release_programming&noheader}}

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At this point, the demo is now running on your Cmod S7. Refer to the [[#description|Description]] section of this document for more information on what it does.

**Important!** //Take care not to apply a voltage greater than 5.5 Volts to the analog pins. See the [[programmable-logic:cmod-s7:reference-manual#analog_inputs|Analog Inputs]] section of the Cmod S7 reference manual for more information on these pins.//
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Additional steps beyond here present how you can use the other archive provided in the release, containing the hardware project, to rebuild the Vivado project, and use a newly exported XSA file to update the platform in Vitis.
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{{page>programmable-logic:guides:using-github-releases#baremetal_update_specification&noheader}}


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===== Additional Resources =====

All materials related to the use of the Cmod S7 can be found on its [[..:start|Resource Center]].

For a walkthrough of the process of creating a simple baremetal software project in Vivado and Vitis, see [[programmable-logic:guides:getting-started-with-ipi]]. Information on important parts of the GUIs, and indirect discussion of the steps required to modify, rebuild, and run this demo in hardware can also be found here.

For technical support, please visit the [[https://forum.digilent.com/forum/4-fpga/|FPGA]] section of the Digilent Forum.

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