~~NOTOC~~ 
   
====== Pmod LVLSHFT ======

  
{{Digilent Infobox
| Store Page = https://digilent.com/shop/pmod-lvlshft-logic-level-shifter/
| Manual = [[reference-manual]]
| Support = https://forum.digilent.com/forum/7-add-on-boards/
| Title = Pmod LVLSHFT
| Subtitle = Logic Level Shifter
| Header = Features
| Bullet = Digital logic level shifter
| Bullet = Translate logic signals between two user supplied voltage levels
| Bullet = 2×7 JTAG header
| Bullet = 8 miniature switches to dictate logic level conversion
| Bullet = Voltage range between 1.8V and 5.5V
| Bullet = 12-pin Pmod port with GPIO interface
| Bullet = Follows the Digilent {{/reference/pmod/digilent-pmod-interface-specification.pdf |Pmod Interface Specification}}
| Header = Electrical
| Bus = [[learn/fundamentals/communication-protocols/gpio/start | GPIO]]
| Specification Version = 1.2.0
| Logic Level = 1.8V to 5.5V
| Header = Physical
| Width = 1.75 in (4.45 cm)
| Length = 0.80 in (2.03 cm)
| Header = Design Resources
| 3D CAD file = {{reference:pmod:pmodlvlshft:pmod_lvlshft.zip|STP file}}
| Header = Documentation
| Primary IC = [[http://www.ti.com/lit/ds/symlink/sn74lvc1t45.pdf | SN47LVC1T45]]
| Reference Manual = [[pmod/pmodlvlshft/reference-manual]]
| Schematic = {{reference:pmod:pmodlvlshft:pmodlvlshft_sch.pdf| }}
| Header = J1 Pinout
| Full Row = {{ :reference:pmod:pmod-pinout-2x6.png?direct |}}
| Pin 1 = AIO1/TMS
| Pin 2 = AIO2/TDI
| Pin 3 = AIO3/TDO
| Pin 4 = AIO4/TCK
| Pin 5 = GND
| Pin 6 = VCCA
| Pin 7 = AIO5
| Pin 8 = AIO6
| Pin 9 = AIO7
| Pin 10 = AIO8
| Pin 11 = GND
| Pin 12 = VCCA
| Header = J2 Pinout
| Pin 1 = GND
| Pin 2 = VCCB
| Pin 3 = GND
| Pin 4 = BIO1/TMS
| Pin 5 = GND
| Pin 6 = BIO4/TCK
| Pin 7 = GND
| Pin 8 = BIO3/TDO
| Pin 9 = GND
| Pin 10 = BIO2/TDI
| Pin 11 = GND
| Pin 12 = NC
| Pin 13 = GND
| Pin 14 = SRST
| Header = J3 Pinout
| Pin 1 = BIO1/TMS
| Pin 2 = BIO5/SRST
| Pin 3 = BIO2/TDI
| Pin 4 = BIO6
| Pin 5 = BIO3/TDO
| Pin 6 = BIO7
| Pin 7 = BIO4/TCK
| Pin 8 = BIO8
| Header = J4 Pinout
| Pin 1 = VCCB
| Pin 2 = GND
}}

{{page>reference-manual}} \\ \\
 

===== Example Projects =====
  * Digilent Pmod IPs are only supported in Vivado and Xilinx SDK versions 2019.1 and earlier.
  * [[https://digilent.com/reference/test-and-measurement/digital-discovery/controlling-digital-discovery-with-labview/start | Controlling Digital Discovery With LabVIEW ]]

==Programmable Logic==
  * No programmable logic example projects are available for the Pmod LVLSHFT


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===== Additional Resources =====
  * Specification Version 1.2.0: {{reference/pmod/pmod-interface-specification-1_2_0.pdf |PDF}}

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{{tag>pmod pmod-start pmod-gpio pmodlvlshft logic-level-shifter resource-center}}