~~REDIRECT>programmable-logic/atlys/start~~

====== Atlys Resource Center======

//NOTE:// The Atlys name has been rebranded as Nexys Video. For all future Atlys products, please look at the Nexys family line. See the [[Migration Guide]] for the Atlys to the Nexys Video. 

**Welcome to the resource center for the Atlys!**

{{ :atlys:atlys:atlys-obl-colorbg-1500.jpg?400 |}}

The Atlys circuit board is a complete, ready-to-use digital circuit development platform based on a Xilinx Spartan 6 LX45 FPGA. The on-board collection of high-end peripherals, including Gbit Ethernet, HDMI Video, 128Mbyte DDR2 memory array, audio and USB ports make the Atlys board an ideal host for complete digital systems built around embedded processors like Xilinx’s MicroBlaze. Atlys is fully compatible with all Xilinx CAD tools, including ChipScope, EDK, and the free WebPack, so designs can be completed with no extra costs. 


Here you will find all the reference materials that Digilent has created for this board, as well as links to any external content we have tracked down. If you are interested in purchasing the Atlys, visit the product page on our main website: [[https://digilent.com/reference/programmable-logic/atlys/start?redirect=1|Atlys]]




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=====Revision History =====

We are currently on Revision C of the Atlys.
You can find the revision of your board by looking on the underside, near the white bar-coded box. 


{{ :anvyl:atlys_bottom.png?400 |}}

=====Migration to Nexys Video =====
If you are looking for the replacement of this board, please look at the [[:nexysvideo|Nexys Video.]] 
See the [[Migration Guide]] for the Atlys to the Nexys Video. 


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===== Documentation =====


  * **Schematic** -- {{:atlys:atlys:atlys_sch.pdf|PDF}}
    * PDF Schematic of the PCB generated by Altium
  * **Reference Manual** -- [[refmanual|Wiki]] {{:atlys:atlys:atlys_rm.pdf|PDF}}
    * Technical description of the Atlys and all of its features. The Wiki may contain more up-to-date information than the PDF.
  * **VHDCI Plug Data Sheet** -- {{:atlys:atlys:r-hi-008068-2_plug.pdf|PDF}}
    * Datasheet for VHDCI plug that provides pinout and dimension specifications
  * **VHDCI Receptacle Datasheet** -- {{:atlys:atlys:r-hs-008068-2c_receptacle.pdf|PDF}} 
    * Data sheet for VHDCI receptacle that provides pinout and dimension specifications
  * **Sell Sheet** -- {{:atlys:atlys:atlys_ss.pdf|PDF}}
===== Demonstration Projects =====

  * **Atlys Demo/BIST Config** -- {{:atlys:atlys:atlys_demo_bist_clean.zip|ZIP}} 
    * Source code for Atlys Demo/BIST configuration (factory loaded into SPI Flash)
  * **Flash Memory Config** -- {{:atlys:atlys:atlys_mantest3_initmemtest_clean.zip|ZIP}} 
    * Source code for Atlys DDR2 and SPI Flash memory controller configuration
  * **VmodTFT Demo** -- {{:atlys:atlys:vmodtft_simple_paint_demo.zip|ZIP}} 
    * This demo project is for the VmodTFT and either the Nexys3 or the Atlys. It continuously samples the VmodTFT's touch panel for X, Y and pressure values and lights up the pixels touched.
  * **EDK Microblaze Demo** -- {{:atlys:atlys:atlys_ac97_edk_demo.zip|Download}} 
    * This zip file contains an EDK demo project that illustrates how to use the AC97 codec on the Atlys board with Microblaze.
  * **EDK HDMI Demo** -- {{:atlys:atlys:atlys_hdmi_plb_demo.zip|ZIP}} 
    * This zip file contains an EDK demo project that demonstrates using HDMI on the Atlys board. It accepts an HDMI input, buffers the input frames into memory, and then outputs the buffer to another HDMI port. This is implemented using PLB bus.
  * **ISE Demo** -- {{:atlys:atlys:atlys_ise_gpio_uart.zip|ZIP}}
  * {{:atlys:atlys:atlys_ise_gpio_uart.zip|Download}} This zip file contains an ISE demo project that demonstrates the use of general I/O and UART on the Atlys board in VHDL.
  * **EDK Web Server** -- {{:atlys:atlys:atlys_axi_web_server_demo_v_1_02.zip|ZIP}} 
    * This zip file contains an EDK demo project that illustrates how to host a web server on the Atlys. It was built using EDK 14.3.


===== Firmware =====

  * **Binary Image for BIST** --  {{:atlys:atlys:atlys4.zip|ZIP}} 
    * Built binary image for Atlys_Demo_BIST. This can be used to restore the original factory image in the Atlys SPI Flash. To reprogram, use the Flash tab in the Adept Application.


===== Reference Designs =====

  * **Master UCF File** -- {{:atlys:atlys:atlysgeneralucf.zip|ZIP}}
  * **Atlys Support Files** -- {{:atlys:atlys:atlys_bsb_support_v_3_7.zip|ZIP}} 
    * Atlys board support files for EDK BSB wizard. Supports EDK 13.2 - 14.7 for both AXI and PLB buses.


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===== External Links =====
  * [[https://forum.digilentinc.com/forum/4-fpga/|Digilent Forum]]