{"id":4397,"date":"2015-01-14T15:26:45","date_gmt":"2015-01-14T23:26:45","guid":{"rendered":"https:\/\/blog.digilentinc.com\/?p=4397"},"modified":"2015-01-14T13:18:52","modified_gmt":"2015-01-14T21:18:52","slug":"behind-the-scenes-with-sume","status":"publish","type":"post","link":"https:\/\/digilent.com\/blog\/behind-the-scenes-with-sume\/","title":{"rendered":"Behind the Scenes with SUME"},"content":{"rendered":"<p>You may have heard of the <a href=\"https:\/\/digilent.com\/blog\/Products\/Detail.cfm?NavPath=2,400,1328&amp;Prod=NETFPGA-10G-SUME\">NetFPGA-SUME<\/a>, Digilent&#8217;s amazingly advanced board that features one of the largest and most complex FPGAs ever produced. But what is the\u00a0story behind it?<\/p>\n<figure id=\"attachment_4541\" aria-describedby=\"caption-attachment-4541\" style=\"width: 600px\" class=\"wp-caption aligncenter\"><a href=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/15215749963_b9d251c548_z.jpg\"><img loading=\"lazy\" decoding=\"async\" class=\"size-medium wp-image-4541\" src=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/15215749963_b9d251c548_z-600x328.jpg\" alt=\"The NetFPGA SUME board. \" width=\"600\" height=\"328\" srcset=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/15215749963_b9d251c548_z-600x328.jpg 600w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/15215749963_b9d251c548_z-225x123.jpg 225w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/15215749963_b9d251c548_z.jpg 640w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/a><figcaption id=\"caption-attachment-4541\" class=\"wp-caption-text\">The NetFPGA SUME board.<\/figcaption><\/figure>\n<p>Digilent was approached by several individuals\u00a0at <a href=\"http:\/\/netfpga.org\/2014\/#\/about\/\">the NetFPGA organization<\/a>\u00a0 about creating a board for networking R&amp;D (research and development) projects. They had a previous version of the board that they wanted to upgrade, and Digilent got on the job. They also wanted to take advantage of Xilinx&#8217;s new Virtex-7 FPGA to create a PCIe form factor board. By using DDR RAM, the primary engineers working on the SUME project (Michael Alexander and Garrett Aufdemberg) were able to provide more memory than previous attempts at such a broad-scale board.<\/p>\n<p>&nbsp;<\/p>\n<p>However, there were some very real challenges associated with creating a board of this magnitude. In addition to many, many late nights for those involved with the project, there were some tangible ones like falling capacitors, accidentally creating an oscillator on a regulator circuit, and finding a way to deal with the heat created by the board. &#8220;We knew heat would be an issue,&#8221; commented Aufdemberg. Alexander and Aufdemberg asked Steve Wang to take a look and create some heat sinks for the board.<\/p>\n<figure id=\"attachment_4567\" aria-describedby=\"caption-attachment-4567\" style=\"width: 600px\" class=\"wp-caption aligncenter\"><a href=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett.png\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4567 size-medium\" src=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett-600x361.png\" alt=\"screenshot-SUME-garrett\" width=\"600\" height=\"361\" srcset=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett-600x361.png 600w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett-1024x616.png 1024w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett-225x135.png 225w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett-800x481.png 800w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/screenshot-SUME-garrett.png 1680w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/a><figcaption id=\"caption-attachment-4567\" class=\"wp-caption-text\">Screenshot of Garrett talking about the SUME.<\/figcaption><\/figure>\n<p>&nbsp;<\/p>\n<p>High-speed and high-density requirements provided some challenges, though they were obviously surmountable. Aufdemberg, while speaking of the challenges associated with creating a board of this magnitude, is both excited and proud about all that was accomplished. With 16 layers, almost 1500 components, over 5000 signal connections, and fourteen high-speed buses that can run 12.5 GHz, it&#8217;s truly impressive! (The schematic has thirty\u00a0sheets!)<\/p>\n<p>&nbsp;<\/p>\n<p>The NetFPGA-SUME&#8217;s main mission is to give students, researchers and developers a state-of-the-art platform for networking, whether it\u2019s learning the fundamentals or creating new hardware and software applications. Make sure you check it out on the Digilent website and check back here on the blog for more info soon!<\/p>\n<div class='watch-action'><div class='watch-position align-left'><div class='action-like'><a class='lbg-style6 like-4397 jlk' data-task='like' data-post_id='4397' data-nonce='0f678f749c' rel='nofollow'><img src='https:\/\/digilent.com\/blog\/wp-content\/plugins\/wti-like-post-pro\/images\/pixel.gif' title='Like' \/><span class='lc-4397 lc'>0<\/span><\/a><\/div><div class='action-unlike'><a class='unlbg-style6 unlike-4397 jlk' data-task='unlike' data-post_id='4397' data-nonce='0f678f749c' rel='nofollow'><img src='https:\/\/digilent.com\/blog\/wp-content\/plugins\/wti-like-post-pro\/images\/pixel.gif' title='Unlike' \/><span class='unlc-4397 unlc'>0<\/span><\/a><\/div><\/div> <div class='status-4397 status align-left'>Be the 1st to vote.<\/div><\/div><div class='wti-clear'><\/div>","protected":false},"excerpt":{"rendered":"<p>You may have heard of the NetFPGA-SUME, Digilent&#8217;s amazingly advanced board that features one of the largest and most complex FPGAs ever produced. But what is the story behind it?<\/p>\n","protected":false},"author":7,"featured_media":4541,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_monsterinsights_skip_tracking":false,"_monsterinsights_sitenote_active":false,"_monsterinsights_sitenote_note":"","_monsterinsights_sitenote_category":0,"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[35],"tags":[1662,36],"ppma_author":[4464],"class_list":["post-4397","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-fpga","tag-fpga","tag-xilinx"],"jetpack_featured_media_url":"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2015\/01\/15215749963_b9d251c548_z.jpg","jetpack_sharing_enabled":true,"authors":[{"term_id":4464,"user_id":7,"is_guest":0,"slug":"amber_mear","display_name":"Amber Mear","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/d0fc56ab4035f79884675bde2a948e84c1d14dd33b730b4c142dde6f1a962395?s=96&d=mm&r=g","1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":"","9":"","10":""}],"post_mailing_queue_ids":[],"_links":{"self":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts\/4397","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/users\/7"}],"replies":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/comments?post=4397"}],"version-history":[{"count":0,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts\/4397\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/media\/4541"}],"wp:attachment":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/media?parent=4397"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/categories?post=4397"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/tags?post=4397"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/ppma_author?post=4397"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}