![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/GenesysZU-top-RevA-1000.png\")
<\/h2>\n<\/h2>\nThis paper will provide a step-by-step guide to build from ground up a Genesys ZU development board-based hardware and software project that is capable of running Arch Linux operating system (in theory any embedded ARM64 compiled Linux operating system can be used following this guide). All generated files are included and can be downloaded at the end of this guide. The development environment used to generate the example project was Vivado 2021.1, under Ubuntu Linux 20.4 LTS. Instructions on how to install Vivado under Linux and what licensing options are available can be found here<\/a>. \u00a0 of the hardware development can be done under Windows OS, however, the bootloader and Linux environment compilation requires a working Linux environment or the use of Windows Subsystem for Linux<\/a>.<\/p>\n All attachments can be found at the links below:<\/p>\n The project has two major parts: the hardware platform generated in the Vivado environment and the software platform, partially (FSB, device-tree) generated by the Vivado tool or the Vitis IDE. Other software components, namely, the ARM Trusted Firmware, u-boot bootloader and the Linux Kernel needs to be compiled separately in a Linux environment using an ARM64 compiler (the Xilinx development environment contains the necessary compiler).<\/p>\n $ source settings64.sh<\/p><\/blockquote>\n<\/li>\n $ vivado<\/p><\/blockquote>\n<\/li>\n $ vitis<\/p><\/blockquote>\n<\/li>\n $ patch -p0 < fsbl.patch<\/p><\/blockquote>\n<\/li>\n $ git clone https:\/\/github.com\/Xilinx\/device-tree-xlnx<\/u><\/a><\/p>\n $ cd device-tree-xlnx\/<\/p>\n $ git checkout \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0xlnx_rel_v2021.1 (use the version of the development environment)<\/em><\/p><\/blockquote>\n<\/li>\n $ patch \u2013p0 < device-tree.patch<\/p><\/blockquote>\n This will include the board-specific configuration.<\/li>\n $ gcc -I . -E -nostdinc -undef -D__DTS__ -x assembler-with-cpp -o system.dts system-top.dts $ git clone https:\/\/github.com\/Xilinx\/arm-trusted-firmware The generated binary bl31.elf file can be found at \/build\/zynqmp\/release\/bl31\/<\/li>\n $ git clone https:\/\/github.com\/Xilinx\/u-boot-xlnx<\/p>\n $ cd u-boot-xlnx\/<\/p>\n $ git checkout xilinx-v2021.1<\/p><\/blockquote>\n<\/li>\n $ cp <path to generated device-tree>\/genesys-zu.dtb <path to u-boot-xlnx>\/arch\/arm\/dts\/<\/p><\/blockquote>\n<\/li>\n $ export CROSS_COMPILE=aarch64-linux-gnu-<\/p>\n $ export ARCH=aarch64<\/p><\/blockquote>\n<\/li>\n $ make xilinx_zynqmp_virt_defconfig<\/p><\/blockquote>\n<\/li>\n $ patch -p0 < uboot.patch<\/p><\/blockquote>\n<\/li>\n $ sudo apt-get install libncurses-dev gawk flex bison openssl libssl-dev libelf-dev libudev-dev libpci-dev libiberty-dev autoconf<\/p><\/blockquote>\n Afterwards, clone the Xilinx maintained kernel from their git repository. Run the commands from a terminal where Navigate to a folder with write permissions and execute:<\/p>\n $ git clone https:\/\/github.com\/Xilinx\/linux-xlnx<\/p>\n $ cd linux-xlnx\/<\/p>\n $ git checkout xilinx-v2021.1<\/p><\/blockquote>\n Make a ZynqMP based default configuration<\/p>\n $ make ARCH=arm64 xilinx_zynqmp_defconfig<\/p><\/blockquote>\n Copy the provided patch file to the linux-xlnx folder and apply it.<\/p>\n $ patch -p0 < kernel.patch<\/p><\/blockquote>\n Add any additional configuration or drivers by running the menuconfig command. When done, the kernel can be compiled.<\/p>\n $ make ARCH=arm64 menuconfig<\/p>\n $ make ARCH=arm64<\/p><\/blockquote>\n The compiled kernel image can be found at <path to linux-xlnx>\/arch\/arm<\/em>64<\/em>\/boot. <\/em>The name of the binary kernel file is Image,<\/em> without extension. If the graphical interface is used to generate the BOOT.BIN file, the kernel file \u00a0\u00a0\u00a0\u00a0\u00a0must have extension. It can be renamed Image.ub<\/em>.<\/li>\n $ bootgen -arch zynqmp -image FSBL_system.bif -o BOOT.BIN \u2013w<\/p><\/blockquote>\n The BOOT.BIN can also be generated from the graphical environment, as the user can import the provided bif file or create a new one.<\/p>\n When creating a new bif file, the first file it has to contain is the FSBL bootloader and which processor it will run on, designated by the destination_cpu option.<\/p>\n [bootloader, destination_cpu = a53-0]FSBL.elf<\/p>\n The second position is the PMU firmware if it exists.<\/p>\n[pmufw_image]PMUFirmware.elf<\/p>\n Then the user can specify with the destination_device=pl option, the bit file for the reconfigurable part of the FPGA and the FSBL will configure it.<\/p>\n[destination_device = pl]genesys-zu.bit<\/p>\n The Zynq Ultrascale devices use the ARM Trusted Firmware secure software stack, where the Linux operating system is running. As the OS runs at ARM EL1\/0 level, it has limited access to system or security-critical registers and devices. All calls from Linux to those registers and devices are routed trough the ARM Trusted Firmware, which is running at EL3, this is the next file that the FSBL loads with the EL3 level set.<\/p>\n[destination_cpu = a53-0, execution_level = el-3, trustzone]bl31.elf<\/p>\n The last file needed is the u-boot bootloader that will load the Linux operating system. This will run at trust level EL2.<\/p>\n[destination_cpu = a53-0, execution_level = el-2]u-boot.elf<\/p>\n U-Boot has the capability to load the Linux kernel, the ramdisk and the device-tree from multiple external sources. In the given example project these files are stitched in the BOOT.bin file with a load option telling the FSBL to load the corresponding file to the given memory address. This way, U-Boot doesn\u2019t have to load any images just simply boots by directly issuing a matching booti command.<\/p>\n[load = 0x2a00000, destination_cpu = a53-0]genesis-zu.dtb<\/p>\n[load = 0x2000000, destination_cpu = a53-0]uramdisk.image.gz<\/p>\n[load = 0x3000000, destination_cpu = a53-0]Image.ub<\/p>\n When the BOOT.BIN is generated, it \u00a0\u00a0\u00a0\u00a0\u00a0must be copied on the FAT32 formatted first partition of an SD card, and the second partition \u00a0\u00a0\u00a0\u00a0\u00a0must be ext4 formatted, containing the extracted ARCH Linux files downloaded from this link<\/a>. Extract the archive using the tar command to the second partition of the SD card.<\/p>\n $ tar -xvf archlinuxarm-aarch64-latest.tar.gz<\/p><\/blockquote>\n The SD card can be formatted from any Linux Distribution using a GUI app like gparted or from terminal, using the fdisk<\/a> command. If everything is applied correctly, the Arch Linux operating system will start, if the JP3 jumper is set to the SD card position. Connect the USB cable to the J8 port, open a serial terminal app like Putty, select the virtual COM port, set baud rate to 115200. If everything is set correctly, the Arch Linux will boot and a login terminal will appear.<\/p>\n <\/li>\n<\/ol>\n<\/li>\n<\/ol>\n<\/li>\n<\/ol>\n\n
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![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-1-Design-Flow-505x600.png\")
Compiling the Hardware<\/h2>\n
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\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-2-New-project-generation-600x444.png\")
<\/li>\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-3-Board-Setup-600x422.jpg\")
<\/li>\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-4-Creating-a-Hardware-Design-600x353.jpg\")
<\/li>\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-5-Inserting-the-Zynq-Core-600x353.jpg\")
![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-6-the-ZynqMP-core-configuration-600x390.png\")
\nThe emio_enet0_enet_tsu_timer_cnt<\/a> ports can be left unconnected. ![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-7-Block-diagram-of-minimal-hardware-design-600x204.png\")
<\/li>\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-8-Creating-a-new-constraint-file-600x375.jpg\")
![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-9-Contents-of-the-constraint-file-600x249.jpg\")
![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-10-Creating-the-HDL-Wrapper-600x375.jpg\")
Compiling the Software<\/h2>\n
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![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-11-Exporting-the-Design-600x375.jpg\")
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\nThe first one, inside the hardware platform project, by ticking \u201cGenerate Boot Components”. The Digilent-provided FSBL is required and should be added to the Vitis workspace in the Xilinx->Software Repositories menu (Vitis -> Window -> Preferences -> Xilinx -> Software Repository).
\nDownload the FSBL source code from https:\/\/github.com\/Digilent\/embeddedsw\/tree\/genesys-zu-21.1<\/a>.
\nAdd the path as a local software repository and Vitis will use the Genesys ZU-specific FSBL instead of the generic one.<\/li>\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-12-Creating-a-new-Vitis-application-project-600x484.png\")
<\/li>\n<\/ol>\n<\/li>\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-13-Application-project-configuration-600x484.png\")
![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-13-Application-project-configuration-Step-2-600x484.png\")
\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-16-PMU-Firmware-application-project-configuration-Step-1-600x484.png\")
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\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-18-Adding-device-tree-repository-553x600.png\")
![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-19-Device-tree-GUI-generation-600x301.png\")
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\n$ dtc -W no-unit_address_vs_reg -I dts -O dtb -o genesys-zu.dtb system.dts<\/p><\/blockquote>\n<\/li>\n
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\n$ cd arm-trusted-firmware\/
\n$ git checkout xlnx_rebase_v2.4_2021.1
\n$ make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1<\/p><\/blockquote>\n
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\n![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2022\/04\/Figure-21-Creating-the-Boot-Image-from-the-GUI-600x431.png\")
