{"id":27925,"date":"2020-08-12T14:32:12","date_gmt":"2020-08-12T21:32:12","guid":{"rendered":"https:\/\/blog.digilentinc.com\/?p=27925"},"modified":"2020-12-21T11:11:44","modified_gmt":"2020-12-21T19:11:44","slug":"navigating-the-difference-between-pmod-syzygy-and-fmc","status":"publish","type":"post","link":"https:\/\/digilent.com\/blog\/navigating-the-difference-between-pmod-syzygy-and-fmc\/","title":{"rendered":"Navigating the Difference Between Pmod, SYZYGY, and FMC"},"content":{"rendered":"<p>For years, hardware engineers with interchangeable I\/O needs had two strong choices &#8211; our own <a href=\"https:\/\/pmod.org\/#\/about\">Pmod<\/a>, which was developed as an open standard back in 2004, as well as the FPGA Mezzanine Card (<a href=\"https:\/\/en.wikipedia.org\/wiki\/FPGA_Mezzanine_Card\">FMC<\/a>), developed by a consortium of companies and end users and fronted by Xilinx. Both Pmods and FMC had their own specific uses &#8211; but what if you needed something else when designing an FPGA?<\/p>\n<h4>Pmod<\/h4>\n<p>The Pmod standard uses a 6-, 8-, or 12-pin communication protocol with LVCMOS 3.3 V logic conventions. It was initially designed for use in Academia, but quickly found a home in professional designs as well. It did a good job of removing the cost barrier, as Pmod devices are typically very efficient and cost-effective. In taking advantage of popular serial protocols (SPI, I2C, and UART), it was recognized as a flexible option for rapid prototyping.\u00a0 They also allow for more effective designs by routing analog signals and power supplies only where they are needed, and away from digital controller boards.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"alignnone size-medium wp-image-25194\" src=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2018\/08\/isn-600x401.jpg\" alt=\"\" width=\"600\" height=\"401\" data-wp-pid=\"25194\" srcset=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2018\/08\/isn-600x401.jpg 600w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2018\/08\/isn.jpg 700w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/p>\n<p>However, there are some limitations.<\/p>\n<p>Though affordable and flexible, the low pin count can make Pmod unsuitable for some peripherals with heavier resource demands or applications that require higher frequency outputs. There is also a lack of impedance control on most devices.<\/p>\n<h4>FMC<\/h4>\n<p>On the other end of the FPGA I\/O spectrum, the FMC standard provides much higher range of acceptable signaling speeds (up to 10 Gb\/s!). The design simplicity significantly reduces power consumption, IP core costs, engineering time, and latency. The FMC Standard also promotes the ability retarget existing FPGA card designs to a new I\/O.<\/p>\n<p>However &#8211; there&#8217;s always a drawback, isn&#8217;t there? &#8211; with a single-width (69 mm x 76.5 mm) or Double width (139 mm x 76.5 mm) form factor, the FMC does require quite a bit more real estate on an FPGA board. Improved signaling speeds also mean that it has a higher FPGA pin consumption. In addition, with all of these features, the FMC Standard is &#8211; you guessed it &#8211; more expensive.<\/p>\n<figure id=\"attachment_27926\" aria-describedby=\"caption-attachment-27926\" style=\"width: 640px\" class=\"wp-caption alignnone\"><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-27926\" src=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/fmc.jpg\" alt=\"\" width=\"640\" height=\"427\" data-wp-pid=\"27926\" srcset=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/fmc.jpg 640w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/fmc-600x400.jpg 600w\" sizes=\"auto, (max-width: 640px) 100vw, 640px\" \/><figcaption id=\"caption-attachment-27926\" class=\"wp-caption-text\"><em>Photo by Philipp Psurek<\/em><\/figcaption><\/figure>\n<h4>SYZYGY<\/h4>\n<p>Noting that a majority of FPGA enthusiasts and designers were using one of the aforementioned standards, Portland&#8217;s <a href=\"https:\/\/opalkelly.com\/\">Opal Kelly<\/a> went to work on an FPGA standard that straddled the differences between Pmod and FMC but create a happy medium that also exploited the benefits of each. In 2017, <a href=\"http:\/\/syzygyfpga.io\">SYZYGY<\/a> (sih-zuh-gee) was unveiled. Each limitation and strength that was brought up earlier seems to have been addressed with the new standard: moderate pin count, high performance speeds, medium cost barrier, voltage flexibility with SmartVIO, better pin utilization with standard\/transceiver cross-compatibility.<\/p>\n<p>The advent of SYZGY is important for a couple of reasons: it gives Pmod users the ability to expand their capabilities without the limitations of Pmod and FMC users a way to ditch the resource-prohibitive specs of FMC.<\/p>\n<p>The SYZYGY standard is open source, and we urge intrepid designers to <a href=\"https:\/\/syzygyfpga.io\/specification\/\">see what they can do with it<\/a>. We&#8217;ve used it on a couple of our newest boards (the<a href=\"https:\/\/digilent.com\/shop\/eclypse-z7-zynq-7000-soc-development-board-with-syzygy-compatible-expansion\/?utm_source=digilent%20blog&amp;utm_medium=referral&amp;utm_campaign=syzygy&amp;utm_content=navigating%20pmod%20fmc%20syzygy\"> Eclypse Z7<\/a> and <a href=\"https:\/\/digilent.com\/shop\/genesys-zu-zynq-ultrascale-mpsoc-development-board\/\">Genesys ZU<\/a>) and converter modules (<a href=\"https:\/\/digilent.com\/shop\/zmod-adc-1410-syzygy-compatible-dual-channel-14-bit-analog-to-digital-converter-module\/\">Zmod ADC<\/a> and <a href=\"https:\/\/digilent.com\/shop\/zmod-dac-1411-syzygy-compatible-dual-channel-14-bit-digital-to-analog-converter-module\/?utm_source=digilent%20blog&amp;utm_medium=referral&amp;utm_campaign=syzygy&amp;utm_content=navigating%20pmod%20fmc%20syzygy\">Zmod DAC<\/a>) to very positive reviews.<\/p>\n<figure id=\"attachment_27927\" aria-describedby=\"caption-attachment-27927\" style=\"width: 600px\" class=\"wp-caption alignnone\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-27927 size-medium\" src=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy-600x529.jpg\" alt=\"Syzygy standard specification\" width=\"600\" height=\"529\" data-wp-pid=\"27927\" srcset=\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy-600x529.jpg 600w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy-1024x903.jpg 1024w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy-768x677.jpg 768w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy-800x705.jpg 800w, https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy.jpg 1200w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><figcaption id=\"caption-attachment-27927\" class=\"wp-caption-text\"><em>The SYZYGY Standard<\/em><\/figcaption><\/figure>\n<div class='watch-action'><div class='watch-position align-left'><div class='action-like'><a class='lbg-style6 like-27925 jlk' data-task='like' data-post_id='27925' data-nonce='4f65629f7b' rel='nofollow'><img src='https:\/\/digilent.com\/blog\/wp-content\/plugins\/wti-like-post-pro\/images\/pixel.gif' title='Like' \/><span class='lc-27925 lc'>+1<\/span><\/a><\/div><div class='action-unlike'><a class='unlbg-style6 unlike-27925 jlk' data-task='unlike' data-post_id='27925' data-nonce='4f65629f7b' rel='nofollow'><img src='https:\/\/digilent.com\/blog\/wp-content\/plugins\/wti-like-post-pro\/images\/pixel.gif' title='Unlike' \/><span class='unlc-27925 unlc'>0<\/span><\/a><\/div><\/div> <div class='status-27925 status align-left'><\/div><\/div><div class='wti-clear'><\/div>","protected":false},"excerpt":{"rendered":"<p>For years, hardware engineers with interchangeable I\/O needs had two strong choices &#8211; our own Pmod, which was developed as an open standard back in 2004, as well as the &hellip; <\/p>\n","protected":false},"author":50,"featured_media":27927,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[38,4267,35,1563],"tags":[1662],"ppma_author":[4502],"class_list":["post-27925","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-expansion-modules","category-featured","category-fpga","category-guide","tag-fpga"],"jetpack_featured_media_url":"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2020\/08\/syzygy.jpg","jetpack_sharing_enabled":true,"authors":[{"term_id":4502,"user_id":50,"is_guest":0,"slug":"davidh","display_name":"David Horn","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/917c337136844f075c76fcf4a0c3b94aa8c225366009ebf63c08fcb9ce6d0e52?s=96&d=mm&r=g","1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":"","9":"","10":""}],"post_mailing_queue_ids":[],"_links":{"self":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts\/27925","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/users\/50"}],"replies":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/comments?post=27925"}],"version-history":[{"count":0,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts\/27925\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/media\/27927"}],"wp:attachment":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/media?parent=27925"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/categories?post=27925"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/tags?post=27925"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/ppma_author?post=27925"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}