{"id":27925,"date":"2020-08-12T14:32:12","date_gmt":"2020-08-12T21:32:12","guid":{"rendered":"https:\/\/blog.digilentinc.com\/?p=27925"},"modified":"2020-12-21T11:11:44","modified_gmt":"2020-12-21T19:11:44","slug":"navigating-the-difference-between-pmod-syzygy-and-fmc","status":"publish","type":"post","link":"https:\/\/digilent.com\/blog\/navigating-the-difference-between-pmod-syzygy-and-fmc\/","title":{"rendered":"Navigating the Difference Between Pmod, SYZYGY, and FMC"},"content":{"rendered":"

For years, hardware engineers with interchangeable I\/O needs had two strong choices – our own Pmod<\/a>, which was developed as an open standard back in 2004, as well as the FPGA Mezzanine Card (FMC<\/a>), developed by a consortium of companies and end users and fronted by Xilinx. Both Pmods and FMC had their own specific uses – but what if you needed something else when designing an FPGA?<\/p>\n

Pmod<\/h4>\n

The Pmod standard uses a 6-, 8-, or 12-pin communication protocol with LVCMOS 3.3 V logic conventions. It was initially designed for use in Academia, but quickly found a home in professional designs as well. It did a good job of removing the cost barrier, as Pmod devices are typically very efficient and cost-effective. In taking advantage of popular serial protocols (SPI, I2C, and UART), it was recognized as a flexible option for rapid prototyping.\u00a0 They also allow for more effective designs by routing analog signals and power supplies only where they are needed, and away from digital controller boards.<\/p>\n

\"\"<\/p>\n

However, there are some limitations.<\/p>\n

Though affordable and flexible, the low pin count can make Pmod unsuitable for some peripherals with heavier resource demands or applications that require higher frequency outputs. There is also a lack of impedance control on most devices.<\/p>\n

FMC<\/h4>\n

On the other end of the FPGA I\/O spectrum, the FMC standard provides much higher range of acceptable signaling speeds (up to 10 Gb\/s!). The design simplicity significantly reduces power consumption, IP core costs, engineering time, and latency. The FMC Standard also promotes the ability retarget existing FPGA card designs to a new I\/O.<\/p>\n

However – there’s always a drawback, isn’t there? – with a single-width (69 mm x 76.5 mm) or Double width (139 mm x 76.5 mm) form factor, the FMC does require quite a bit more real estate on an FPGA board. Improved signaling speeds also mean that it has a higher FPGA pin consumption. In addition, with all of these features, the FMC Standard is – you guessed it – more expensive.<\/p>\n

\"\"
Photo by Philipp Psurek<\/em><\/figcaption><\/figure>\n

SYZYGY<\/h4>\n

Noting that a majority of FPGA enthusiasts and designers were using one of the aforementioned standards, Portland’s Opal Kelly<\/a> went to work on an FPGA standard that straddled the differences between Pmod and FMC but create a happy medium that also exploited the benefits of each. In 2017, SYZYGY<\/a> (sih-zuh-gee) was unveiled. Each limitation and strength that was brought up earlier seems to have been addressed with the new standard: moderate pin count, high performance speeds, medium cost barrier, voltage flexibility with SmartVIO, better pin utilization with standard\/transceiver cross-compatibility.<\/p>\n

The advent of SYZGY is important for a couple of reasons: it gives Pmod users the ability to expand their capabilities without the limitations of Pmod and FMC users a way to ditch the resource-prohibitive specs of FMC.<\/p>\n

The SYZYGY standard is open source, and we urge intrepid designers to see what they can do with it<\/a>. We’ve used it on a couple of our newest boards (the Eclypse Z7<\/a> and Genesys ZU<\/a>) and converter modules (Zmod ADC<\/a> and Zmod DAC<\/a>) to very positive reviews.<\/p>\n

\"Syzygy
The SYZYGY Standard<\/em><\/figcaption><\/figure>\n
0<\/span><\/a><\/div><\/div>
<\/div><\/div>
<\/div>","protected":false},"excerpt":{"rendered":"

For years, hardware engineers with interchangeable I\/O needs had two strong choices – our own Pmod, which was developed as an open standard back in 2004, as well as the … <\/p>\n","protected":false},"author":50,"featured_media":27927,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":false,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_feature_clip_id":0,"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_post_was_ever_published":false,"_ppma_block_editor_authors":""},"categories":[38,4267,35,1563],"tags":[1662],"ppma_author":[4502],"class_list":["post-27925","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-expansion-modules","category-featured","category-fpga","category-guide","tag-fpga"],"yoast_head":"\nNavigating the Difference Between Pmod, SYZYGY, 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