{"id":27917,"date":"2020-07-27T11:27:10","date_gmt":"2020-07-27T18:27:10","guid":{"rendered":"https:\/\/blog.digilentinc.com\/?p=27917"},"modified":"2021-04-21T13:12:36","modified_gmt":"2021-04-21T20:12:36","slug":"custom-axi-for-ip-acceleration-using-petalinux","status":"publish","type":"post","link":"https:\/\/digilent.com\/blog\/custom-axi-for-ip-acceleration-using-petalinux\/","title":{"rendered":"Custom AXI for IP Acceleration using Petalinux"},"content":{"rendered":"<p>Pablo at <a href=\"http:\/\/controlpaths.com\">ControlPaths.com<\/a> has written a guide for creating a custom AXI IP using the <a href=\"https:\/\/digilent.com\/shop\/genesys-zu-zynq-ultrascale-mpsoc-development-board\/?utm_source=digilent%20blog&amp;utm_medium=referral&amp;utm_campaign=genesys%20zu&amp;utm_content=custom%20axi\">Genesys ZU<\/a>, but any Zynq MPSoC will do. We&#8217;re partial to the Genesys ZU though.<\/p>\n<p>In his <a href=\"https:\/\/www.controlpaths.com\/2020\/07\/24\/custom-axi-ip-for-acceleration\/\">blog post<\/a>, he explains that FPGAs have <strong>TWO<\/strong> big advantages over other means of processing:<\/p>\n<ul>\n<li>The ability to use custom width in data to save time and space<\/li>\n<li>The processes being managed can be handled in parallel, which essentially doubles the compute power<\/li>\n<\/ul>\n<p>Pablo walks you through accelerating some of the algorithms and executing them partially (or entirely) on FPGA. The algorithm used is an iterative square root finder &#8211; which performs an iterative loop multiplying each number by itself and compares the result with the input value. When the result number is greater than the input value, the square root result is corresponding with the value that we multiplied by itself less 1. Each iteration of the algorithm will perform a multiplication, and a comparison, so the duration of the algorithm will depend of the input number, since the square root of the input number will be the similar to the multiply and compare operations. The time spent on the execution of this algorithm on an APU or RPU will be the time that processor spends in execute this instructions. On the other hand, the time that our acceleration will spend to execute the same algorithm depends on the programmable logic itself. In this case, the processor has to send input value through AXI to the PL, then PL will execute the algorithm, and then, data will return to the processor. This kind of acceleration is very useful when time spent in data interchange is significantly lower than the execution time, meaning <strong>the acceleration can be transformed in deceleration.<\/strong><\/p>\n<p>To read the entire guide, head over to ControlPaths.com for <a href=\"https:\/\/www.controlpaths.com\/2020\/07\/24\/custom-axi-ip-for-acceleration\/\">a detailed example of creating custom AXI IP for accelerating your applications<\/a>.<\/p>\n<div class='watch-action'><div class='watch-position align-left'><div class='action-like'><a class='lbg-style6 like-27917 jlk' data-task='like' data-post_id='27917' data-nonce='1f2f1e898c' rel='nofollow'><img src='https:\/\/digilent.com\/blog\/wp-content\/plugins\/wti-like-post-pro\/images\/pixel.gif' title='Like' \/><span class='lc-27917 lc'>0<\/span><\/a><\/div><div class='action-unlike'><a class='unlbg-style6 unlike-27917 jlk' data-task='unlike' data-post_id='27917' data-nonce='1f2f1e898c' rel='nofollow'><img src='https:\/\/digilent.com\/blog\/wp-content\/plugins\/wti-like-post-pro\/images\/pixel.gif' title='Unlike' \/><span class='unlc-27917 unlc'>0<\/span><\/a><\/div><\/div> <div class='status-27917 status align-left'>Be the 1st to vote.<\/div><\/div><div class='wti-clear'><\/div>","protected":false},"excerpt":{"rendered":"<p>Pablo at ControlPaths.com has written a guide for creating a custom AXI IP using the Genesys ZU, but any Zynq MPSoC will do. We&#8217;re partial to the Genesys ZU though. &hellip; <\/p>\n","protected":false},"author":50,"featured_media":27918,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":false,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_feature_clip_id":0,"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_post_was_ever_published":false,"_ppma_block_editor_authors":""},"categories":[38,4327,35,1563,4324],"tags":[],"ppma_author":[4502],"class_list":["post-27917","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-expansion-modules","category-projects","category-fpga","category-guide","category-research-rapid-prototyping"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v28.7 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Custom AXI for IP Acceleration using Petalinux - Digilent Blog<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/digilent.com\/blog\/custom-axi-for-ip-acceleration-using-petalinux\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Custom AXI for IP Acceleration using Petalinux - Digilent Blog\" \/>\n<meta property=\"og:description\" content=\"Pablo at ControlPaths.com has written a guide for creating a custom AXI IP using the Genesys ZU, but any Zynq MPSoC will do. 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