{"id":22249,"date":"2017-09-20T07:59:44","date_gmt":"2017-09-20T14:59:44","guid":{"rendered":"https:\/\/blog.digilentinc.com\/?p=22249"},"modified":"2021-06-10T16:27:32","modified_gmt":"2021-06-10T23:27:32","slug":"pmod-ip-core-update-fpga-and-zynq-support","status":"publish","type":"post","link":"https:\/\/digilent.com\/blog\/pmod-ip-core-update-fpga-and-zynq-support\/","title":{"rendered":"Pmod IP Core Update – FPGA and Zynq Support"},"content":{"rendered":"

A year ago we introduced the Pmod IP cores, IP blocks for easy drag and drop use in MicroBlaze<\/a> designs. With ready to use IP cores, adding Pmods to your FPGA<\/a> or Zynq <\/a>board can go from hours of additional work down to minutes, especially if you are following our Using Pmod IP’s<\/a> tutorial.<\/p>\n

Since the time of introduction, more Pmods<\/a> have been added and the tutorial has been updated to handle unique cases like using interrupts. The below tables are now included to help you stay up to date on which Pmods and system boards are currently supported, as well as help you navigate through some of the implementation details.<\/p>\n

Pmods Supported<\/strong><\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Pmod<\/th>\nInterface Type<\/th>\nReference clock frequency (MHz<\/abbr>)<\/th>\nReference Clock signal name<\/th>\nInterrupt pin name\/s<\/th>\nUses PmodGPIO<\/th>\nOther Notes<\/th>\n<\/tr>\n<\/thead>\n
8LD<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
ACL<\/abbr><\/th>\nSPI<\/td>\n80<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
ACL2<\/th>\nSPI<\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
AD1<\/th>\nSPI<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\nIf an AXI clock faster than 100MHz is used, customization parameters need to be scaled appropriately.<\/td>\n<\/tr>\n
AD2<\/th>\nIIC<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
ALS<\/th>\nSPI<\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
AMP2<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\ntimer_interrupt<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
BB<\/abbr><\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
BTN<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
DA1<\/th>\nSPI<\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
ENC<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
HYGRO<\/th>\nIIC<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
JSTK<\/th>\nSPI<\/td>\n16<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
JSTK2<\/th>\nSPI<\/td>\n16<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
KYPD<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
LED<\/abbr><\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
NAV<\/th>\nSPI\/GPIO<\/abbr><\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
OLED<\/abbr><\/th>\nSPI\/GPIO<\/abbr><\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
OLEDrgb<\/th>\nSPI\/GPIO<\/abbr><\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
R2R<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
RTCC<\/abbr><\/th>\nIIC<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
SF3<\/th>\nSPI<\/td>\n50<\/td>\next_spi_clk<\/td>\nQSPI_INTERRUPT<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
SWT<\/th>\nGPIO<\/abbr><\/td>\n–<\/td>\n–<\/td>\n–<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
TC1<\/th>\nSPI<\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n
CLS<\/th>\nSPI<\/td>\n50<\/td>\next_spi_clk<\/td>\n–<\/td>\n–<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

 <\/p>\n

Platforms Supported<\/strong><\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Platform<\/th>\nProcessor Type<\/th>\nMemory Interface Generator (MIG) Used?<\/th>\nNotes<\/th>\n<\/tr>\n<\/thead>\n
Arty<\/td>\nMicroblaze<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
Arty S7<\/td>\nMicroblaze<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
Arty Z7<\/td>\nZynq<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n
Basys3<\/td>\nMicroblaze<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n
Cmod A7<\/td>\nMicroblaze<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n
Genesys2<\/td>\nMicroblaze<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
Nexys4<\/td>\nMicroblaze<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n
Nexys4-DDR<\/td>\nMicroblaze<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
Nexys Video<\/td>\nMicroblaze<\/td>\nYes<\/td>\n<\/td>\n<\/tr>\n
ZedBoard<\/td>\nZynq<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n
Zybo<\/td>\nZynq<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n
Zybo Z7<\/td>\nZynq<\/td>\nNo<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

 <\/p>\n

We are consistently adding new products to these lists and updating the tutorial<\/a> to make it easier to follow and more useful. If you have suggestions on what we can improve, please let us know in the comments below or on the Digilent Forum<\/a>!<\/p>\n

0<\/span><\/a><\/div><\/div>
Be the 1st to vote.<\/div><\/div>
<\/div>","protected":false},"excerpt":{"rendered":"

Stay up to date with Pmod IP cores and save time in your FPGA and Zynq designs.<\/p>\n","protected":false},"author":26,"featured_media":22282,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_monsterinsights_skip_tracking":false,"_monsterinsights_sitenote_active":false,"_monsterinsights_sitenote_note":"","_monsterinsights_sitenote_category":0,"footnotes":""},"categories":[38,1554],"tags":[1662],"ppma_author":[4491],"class_list":["post-22249","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-expansion-modules","category-news","tag-fpga"],"jetpack_featured_media_url":"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2017\/09\/pmod-IPs.jpg","authors":[{"term_id":4491,"user_id":26,"is_guest":0,"slug":"talesab","display_name":"Talesa Bleything","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/4ebebd593afbf3d758e9127934708634ab09aeaa7fcfcf6151f4e9ceb9cf6d0e?s=96&d=mm&r=g","1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":"","9":"","10":""}],"post_mailing_queue_ids":[],"_links":{"self":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts\/22249","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/users\/26"}],"replies":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/comments?post=22249"}],"version-history":[{"count":0,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/posts\/22249\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/media\/22282"}],"wp:attachment":[{"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/media?parent=22249"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/categories?post=22249"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/tags?post=22249"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/digilent.com\/blog\/wp-json\/wp\/v2\/ppma_author?post=22249"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}