The project idea came about when he realized that a standard function generator could not be used as a driver for a galvo-mirror in a different project of his and that he needed to look for another solution to get an accurate experimental result.<\/p>\n
Going into the project his design criteria were as follows:<\/p>\n
- \n
- The future function generator must be driven by the PC (Matlab specifically), to provide an\u00a0option to synchronize the camera and the galvo-mirror;<\/li>\n
- To convert a digital command into the analog one, I will need a digital-to-analog converter;<\/li>\n
- To get the galvo-mirror position feedback signal, I will need an analog-to-digital converter;<\/li>\n
- To effectively transfer command signal from Matlab into the code acceptable for DAC and ADC, I will need a programmable device, either a microcontroller or an FPGA board.<\/li>\n<\/ul>\n
As far as the choice between a microcontroller or and FPGA he quoted:<\/p>\n
“The choice between a microcontroller and an FPGA was an easy one for me. Compared to any microcontroller an FPGA board will always have a definite advantage of being faster and more flexible design option, since it\u2019s simply a programmable hardware, capable of executing a few operations in parallel.”<\/p><\/blockquote>\n
In addition to his established criteria, he had the following materials at his disposal for this project:<\/p>\n
- \n
- PC with Matlab and USB port (DTE \u2013 Data Terminal Equipment);<\/li>\n
- FPGA board Nexys 4 DDR board<\/a> (with UART\/JTAG USB port and couple of Pmod ports);<\/li>\n
- DAC PmodDA4;<\/li>\n
- ADC PmodAD2;<\/li>\n
- USB A to micro-B cable; * 2×6 Pin cable; * 2 2×6 headers.<\/li>\n<\/ul>\n
![](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2016\/12\/fgen-600x288.png\")
The Finite State Machine diagram for the Custom Function Generator.<\/figcaption><\/figure>\n Since it is necessary to synchronize the image capturing with the galvo-mirror positioning for his application, all operations in DTE and DCE are going to be executed sequentially, in the fashion similar to the one shown above.<\/p>\n
The whole report includes comprehensive details about his design process and the project. Unfortunately due to its length (19 pages!) we cannot include it in its entirely here. But (spoiler ahead) after an extensive amount of work and experimentation, he finally got the project to behave in the way he intended!<\/p>\n
![](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2016\/12\/30-600x437.jpg\")
Figure 30.<\/figcaption><\/figure>\n From Figure 30 it can be seen that the error patterns repeats itself continuously, which means that the system is very stable. On the other hand, the error value is not the same for the different command signals, which is, in fact, the result of loading effect from the DAC. Since ADC must be driven by a low impedance source, it will be beneficial to place an input buffer amplifier (see datasheet<\/a>), but unfortunately I didn\u2019t have any low-power one on hands to do so.However, this little project can be considered successful, since it allowed me to verify the Function Generator\u2019s concept and implement it using the \u201cbigger\u201d data converters with a very few modifications.<\/p><\/blockquote>\n
Make sure to check out the entire page project report, which can be found on our reference site on the Nexys 4 DDR page<\/a>!<\/p>\n
![\"\"](\"https:\/\/digilent.com\/blog\/wp-content\/uploads\/2016\/12\/snip-600x135.png\")
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